
Robert A. Rose
Examiner (ID: 12998, Phone: (571)272-4494 , Office: P/3727 )
| Most Active Art Unit | 3723 |
| Art Unit(s) | 3723, 3727, 3203, 2899 |
| Total Applications | 3154 |
| Issued Applications | 2531 |
| Pending Applications | 105 |
| Abandoned Applications | 520 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 186029
[patent_doc_number] => 07646076
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-12
[patent_title] => 'Method of fabricating CMOS image sensor'
[patent_app_type] => utility
[patent_app_number] => 12/151859
[patent_app_country] => US
[patent_app_date] => 2008-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 7
[patent_no_of_words] => 2819
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/646/07646076.pdf
[firstpage_image] =>[orig_patent_app_number] => 12151859
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/151859 | Method of fabricating CMOS image sensor | May 8, 2008 | Issued |
Array
(
[id] => 4836789
[patent_doc_number] => 20080277703
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-13
[patent_title] => 'MAGNETORESISTIVE RANDOM ACCESS MEMORY AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/107955
[patent_app_country] => US
[patent_app_date] => 2008-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 8050
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0277/20080277703.pdf
[firstpage_image] =>[orig_patent_app_number] => 12107955
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/107955 | MAGNETORESISTIVE RANDOM ACCESS MEMORY AND METHOD OF MANUFACTURING THE SAME | Apr 22, 2008 | Abandoned |
Array
(
[id] => 82763
[patent_doc_number] => 07745845
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-29
[patent_title] => 'Integrated low leakage schottky diode'
[patent_app_type] => utility
[patent_app_number] => 12/107995
[patent_app_country] => US
[patent_app_date] => 2008-04-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 3106
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/745/07745845.pdf
[firstpage_image] =>[orig_patent_app_number] => 12107995
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/107995 | Integrated low leakage schottky diode | Apr 22, 2008 | Issued |
Array
(
[id] => 4462371
[patent_doc_number] => 07880260
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-01
[patent_title] => 'Semiconductor device with a semiconductor body and method for its production'
[patent_app_type] => utility
[patent_app_number] => 12/107335
[patent_app_country] => US
[patent_app_date] => 2008-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3044
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/880/07880260.pdf
[firstpage_image] =>[orig_patent_app_number] => 12107335
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/107335 | Semiconductor device with a semiconductor body and method for its production | Apr 21, 2008 | Issued |
Array
(
[id] => 53978
[patent_doc_number] => 07772589
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-08-10
[patent_title] => 'High performance flexible substrate thin film transistor and method'
[patent_app_type] => utility
[patent_app_number] => 12/107720
[patent_app_country] => US
[patent_app_date] => 2008-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2067
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/772/07772589.pdf
[firstpage_image] =>[orig_patent_app_number] => 12107720
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/107720 | High performance flexible substrate thin film transistor and method | Apr 21, 2008 | Issued |
Array
(
[id] => 4558346
[patent_doc_number] => 07821107
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-26
[patent_title] => 'Die stacking with an annular via having a recessed socket'
[patent_app_type] => utility
[patent_app_number] => 12/107576
[patent_app_country] => US
[patent_app_date] => 2008-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 3799
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/821/07821107.pdf
[firstpage_image] =>[orig_patent_app_number] => 12107576
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/107576 | Die stacking with an annular via having a recessed socket | Apr 21, 2008 | Issued |
Array
(
[id] => 43595
[patent_doc_number] => 07781838
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-08-24
[patent_title] => 'Integrated circuit including a body transistor and method'
[patent_app_type] => utility
[patent_app_number] => 12/106456
[patent_app_country] => US
[patent_app_date] => 2008-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 25
[patent_no_of_words] => 8433
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/781/07781838.pdf
[firstpage_image] =>[orig_patent_app_number] => 12106456
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/106456 | Integrated circuit including a body transistor and method | Apr 20, 2008 | Issued |
Array
(
[id] => 43545
[patent_doc_number] => 07781806
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-08-24
[patent_title] => 'Optical erase memory structure'
[patent_app_type] => utility
[patent_app_number] => 12/106180
[patent_app_country] => US
[patent_app_date] => 2008-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 4728
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/781/07781806.pdf
[firstpage_image] =>[orig_patent_app_number] => 12106180
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/106180 | Optical erase memory structure | Apr 17, 2008 | Issued |
Array
(
[id] => 5542787
[patent_doc_number] => 20090152664
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-18
[patent_title] => 'Materials, Systems and Methods for Optoelectronic Devices'
[patent_app_type] => utility
[patent_app_number] => 12/106256
[patent_app_country] => US
[patent_app_date] => 2008-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 100
[patent_figures_cnt] => 100
[patent_no_of_words] => 132262
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20090152664.pdf
[firstpage_image] =>[orig_patent_app_number] => 12106256
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/106256 | Materials, systems and methods for optoelectronic devices | Apr 17, 2008 | Issued |
Array
(
[id] => 55078
[patent_doc_number] => 07768135
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-08-03
[patent_title] => 'Semiconductor package with fast power-up cycle and method of making same'
[patent_app_type] => utility
[patent_app_number] => 12/105196
[patent_app_country] => US
[patent_app_date] => 2008-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 7432
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/768/07768135.pdf
[firstpage_image] =>[orig_patent_app_number] => 12105196
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/105196 | Semiconductor package with fast power-up cycle and method of making same | Apr 16, 2008 | Issued |
Array
(
[id] => 4883870
[patent_doc_number] => 20080258202
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-23
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/104945
[patent_app_country] => US
[patent_app_date] => 2008-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4994
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0258/20080258202.pdf
[firstpage_image] =>[orig_patent_app_number] => 12104945
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/104945 | Nonvolatile semiconductor memory device | Apr 16, 2008 | Issued |
Array
(
[id] => 5456039
[patent_doc_number] => 20090256191
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-15
[patent_title] => 'SPLIT GATE NON-VOLATILE MEMORY CELL WITH IMPROVED ENDURANCE AND METHOD THEREFOR'
[patent_app_type] => utility
[patent_app_number] => 12/103246
[patent_app_country] => US
[patent_app_date] => 2008-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4348
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0256/20090256191.pdf
[firstpage_image] =>[orig_patent_app_number] => 12103246
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/103246 | Split gate non-volatile memory cell with improved endurance and method therefor | Apr 14, 2008 | Issued |
Array
(
[id] => 5345
[patent_doc_number] => 07812339
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-10-12
[patent_title] => 'Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures'
[patent_app_type] => utility
[patent_app_number] => 12/102305
[patent_app_country] => US
[patent_app_date] => 2008-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 38
[patent_no_of_words] => 7693
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/812/07812339.pdf
[firstpage_image] =>[orig_patent_app_number] => 12102305
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/102305 | Method for making a semiconductor device including shallow trench isolation (STI) regions with maskless superlattice deposition following STI formation and related structures | Apr 13, 2008 | Issued |
Array
(
[id] => 5414942
[patent_doc_number] => 20090040829
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-12
[patent_title] => 'LATERAL POCKET IMPLANT CHARGE TRAPPING DEVICES'
[patent_app_type] => utility
[patent_app_number] => 12/102410
[patent_app_country] => US
[patent_app_date] => 2008-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 7919
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0040/20090040829.pdf
[firstpage_image] =>[orig_patent_app_number] => 12102410
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/102410 | Lateral pocket implant charge trapping devices | Apr 13, 2008 | Issued |
Array
(
[id] => 24834
[patent_doc_number] => 07795642
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-14
[patent_title] => 'III-nitride devices with recessed gates'
[patent_app_type] => utility
[patent_app_number] => 12/102340
[patent_app_country] => US
[patent_app_date] => 2008-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 32
[patent_no_of_words] => 5079
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/795/07795642.pdf
[firstpage_image] =>[orig_patent_app_number] => 12102340
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/102340 | III-nitride devices with recessed gates | Apr 13, 2008 | Issued |
Array
(
[id] => 6507852
[patent_doc_number] => 20100219499
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-02
[patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/599706
[patent_app_country] => US
[patent_app_date] => 2008-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4224
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0219/20100219499.pdf
[firstpage_image] =>[orig_patent_app_number] => 12599706
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/599706 | Semiconductor device and manufacturing method of the same | Apr 13, 2008 | Issued |
Array
(
[id] => 8470221
[patent_doc_number] => 08299399
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-10-30
[patent_title] => 'Device for connecting metal sheet at the edges'
[patent_app_type] => utility
[patent_app_number] => 12/598496
[patent_app_country] => US
[patent_app_date] => 2008-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2035
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12598496
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/598496 | Device for connecting metal sheet at the edges | Apr 9, 2008 | Issued |
Array
(
[id] => 7802714
[patent_doc_number] => 08130991
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-03-06
[patent_title] => 'Hearing instrument with linearized output stage'
[patent_app_type] => utility
[patent_app_number] => 12/081125
[patent_app_country] => US
[patent_app_date] => 2008-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2874
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/130/08130991.pdf
[firstpage_image] =>[orig_patent_app_number] => 12081125
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/081125 | Hearing instrument with linearized output stage | Apr 9, 2008 | Issued |
Array
(
[id] => 4843259
[patent_doc_number] => 20080179667
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-31
[patent_title] => 'SUB-LITHOGRAPHIC GATE LENGTH TRANSISTOR USING SELF-ASSEMBLING POLYMERS'
[patent_app_type] => utility
[patent_app_number] => 12/099435
[patent_app_country] => US
[patent_app_date] => 2008-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6429
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0179/20080179667.pdf
[firstpage_image] =>[orig_patent_app_number] => 12099435
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/099435 | Sub-lithographic gate length transistor using self-assembling polymers | Apr 7, 2008 | Issued |
Array
(
[id] => 4583189
[patent_doc_number] => 07834431
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-16
[patent_title] => 'Leadframe for packaged electronic device with enhanced mold locking capability'
[patent_app_type] => utility
[patent_app_number] => 12/099446
[patent_app_country] => US
[patent_app_date] => 2008-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2717
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/834/07834431.pdf
[firstpage_image] =>[orig_patent_app_number] => 12099446
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/099446 | Leadframe for packaged electronic device with enhanced mold locking capability | Apr 7, 2008 | Issued |