Search

Robert A. Rose

Examiner (ID: 12998, Phone: (571)272-4494 , Office: P/3727 )

Most Active Art Unit
3723
Art Unit(s)
3723, 3727, 3203, 2899
Total Applications
3154
Issued Applications
2531
Pending Applications
105
Abandoned Applications
520

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5259178 [patent_doc_number] => 20070212810 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'MEMORY DEVICE AND METHOD OF MANUFACTURING THE DEVICE BY SIMULTANEOUSLY CONDITIONING TRANSITION METAL OXIDE LAYERS IN A PLURALITY OF MEMORY CELLS' [patent_app_type] => utility [patent_app_number] => 11/748579 [patent_app_country] => US [patent_app_date] => 2007-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9776 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20070212810.pdf [firstpage_image] =>[orig_patent_app_number] => 11748579 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/748579
Memory device and method of manufacturing the device by simultaneously conditioning transition metal oxide layers in a plurality of memory cells May 14, 2007 Issued
Array ( [id] => 5014053 [patent_doc_number] => 20070257261 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'METHOD FOR FORMING METAL WIRING, METHOD FOR MANUFACTURING ACTIVE MATRIX SUBSTRATE, DEVICE, ELECTRO-OPTICAL DEVICE, AND ELECTRONIC APPRATUS' [patent_app_type] => utility [patent_app_number] => 11/741925 [patent_app_country] => US [patent_app_date] => 2007-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12457 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20070257261.pdf [firstpage_image] =>[orig_patent_app_number] => 11741925 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/741925
METHOD FOR FORMING METAL WIRING, METHOD FOR MANUFACTURING ACTIVE MATRIX SUBSTRATE, DEVICE, ELECTRO-OPTICAL DEVICE, AND ELECTRONIC APPRATUS Apr 29, 2007 Abandoned
Array ( [id] => 152338 [patent_doc_number] => 07683445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-23 [patent_title] => 'Enhanced permeability device structures and method' [patent_app_type] => utility [patent_app_number] => 11/740066 [patent_app_country] => US [patent_app_date] => 2007-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 10588 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/683/07683445.pdf [firstpage_image] =>[orig_patent_app_number] => 11740066 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/740066
Enhanced permeability device structures and method Apr 24, 2007 Issued
Array ( [id] => 65111 [patent_doc_number] => 07759791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-20 [patent_title] => 'High density IC module' [patent_app_type] => utility [patent_app_number] => 11/738330 [patent_app_country] => US [patent_app_date] => 2007-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4053 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/759/07759791.pdf [firstpage_image] =>[orig_patent_app_number] => 11738330 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/738330
High density IC module Apr 19, 2007 Issued
Array ( [id] => 5110526 [patent_doc_number] => 20070194441 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'Redistributed solder pads using etched lead frame' [patent_app_type] => utility [patent_app_number] => 11/788584 [patent_app_country] => US [patent_app_date] => 2007-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1478 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0194/20070194441.pdf [firstpage_image] =>[orig_patent_app_number] => 11788584 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/788584
Redistributed solder pads using etched lead frame Apr 19, 2007 Issued
Array ( [id] => 88723 [patent_doc_number] => RE041369 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2010-06-08 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => reissue [patent_app_number] => 11/788397 [patent_app_country] => US [patent_app_date] => 2007-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 9999 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/041/RE041369.pdf [firstpage_image] =>[orig_patent_app_number] => 11788397 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/788397
Semiconductor device and method of manufacturing the same Apr 18, 2007 Issued
Array ( [id] => 5066671 [patent_doc_number] => 20070187772 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'ALD OF AMORPHOUS LANTHANIDE DOPED TiOX FILMS' [patent_app_type] => utility [patent_app_number] => 11/737460 [patent_app_country] => US [patent_app_date] => 2007-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9071 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20070187772.pdf [firstpage_image] =>[orig_patent_app_number] => 11737460 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/737460
ALD of amorphous lanthanide doped TiOx films Apr 18, 2007 Issued
Array ( [id] => 4883915 [patent_doc_number] => 20080258247 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'SPIN-TRANSFER MRAM STRUCTURE AND METHODS' [patent_app_type] => utility [patent_app_number] => 11/736960 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4268 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20080258247.pdf [firstpage_image] =>[orig_patent_app_number] => 11736960 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736960
Spin-transfer MRAM structure and methods Apr 17, 2007 Issued
Array ( [id] => 5014055 [patent_doc_number] => 20070257263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-08 [patent_title] => 'DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 11/736740 [patent_app_country] => US [patent_app_date] => 2007-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6852 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0257/20070257263.pdf [firstpage_image] =>[orig_patent_app_number] => 11736740 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736740
DISPLAY DEVICE Apr 17, 2007 Abandoned
Array ( [id] => 5098676 [patent_doc_number] => 20070181936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'NOVEL ARCHITECTURE TO MONITOR ISOLATION INTEGRITY BETWEEN FLOATING GATE AND SOURCE LINE' [patent_app_type] => utility [patent_app_number] => 11/736050 [patent_app_country] => US [patent_app_date] => 2007-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6054 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20070181936.pdf [firstpage_image] =>[orig_patent_app_number] => 11736050 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736050
NOVEL ARCHITECTURE TO MONITOR ISOLATION INTEGRITY BETWEEN FLOATING GATE AND SOURCE LINE Apr 16, 2007 Abandoned
Array ( [id] => 5246268 [patent_doc_number] => 20070242502 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'MEMORY ELEMENT AND MEMORY' [patent_app_type] => utility [patent_app_number] => 11/736360 [patent_app_country] => US [patent_app_date] => 2007-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10885 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20070242502.pdf [firstpage_image] =>[orig_patent_app_number] => 11736360 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/736360
Memory element and memory Apr 16, 2007 Issued
Array ( [id] => 5245102 [patent_doc_number] => 20070241336 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-18 [patent_title] => 'THIN FILM TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 11/734390 [patent_app_country] => US [patent_app_date] => 2007-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 12708 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20070241336.pdf [firstpage_image] =>[orig_patent_app_number] => 11734390 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/734390
Thin film transistor Apr 11, 2007 Issued
Array ( [id] => 5175243 [patent_doc_number] => 20070176301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-02 [patent_title] => 'Structure and Method for Bond Pads of Copper-Metallized Integrated Circuits' [patent_app_type] => utility [patent_app_number] => 11/733859 [patent_app_country] => US [patent_app_date] => 2007-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2435 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20070176301.pdf [firstpage_image] =>[orig_patent_app_number] => 11733859 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/733859
Structure and method for bond pads of copper-metallized integrated circuits Apr 10, 2007 Issued
Array ( [id] => 5066673 [patent_doc_number] => 20070187774 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-16 [patent_title] => 'Manufacturing method for an integrated semiconductor structure and corresponding integrated semiconductor structure' [patent_app_type] => utility [patent_app_number] => 11/784637 [patent_app_country] => US [patent_app_date] => 2007-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3575 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0187/20070187774.pdf [firstpage_image] =>[orig_patent_app_number] => 11784637 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/784637
Manufacturing method for an integrated semiconductor structure and corresponding integrated semiconductor structure Apr 8, 2007 Abandoned
Array ( [id] => 5123520 [patent_doc_number] => 20070235790 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Capacitor structure of semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/730810 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5132 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20070235790.pdf [firstpage_image] =>[orig_patent_app_number] => 11730810 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/730810
Capacitor structure of semiconductor device and method of fabricating the same Apr 3, 2007 Issued
Array ( [id] => 282110 [patent_doc_number] => 07554110 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-30 [patent_title] => 'MOS devices with partial stressor channel' [patent_app_type] => utility [patent_app_number] => 11/732380 [patent_app_country] => US [patent_app_date] => 2007-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4105 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/554/07554110.pdf [firstpage_image] =>[orig_patent_app_number] => 11732380 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/732380
MOS devices with partial stressor channel Apr 2, 2007 Issued
Array ( [id] => 4715172 [patent_doc_number] => 20080237694 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'Integrated circuit, cell, cell arrangement, method for manufacturing an integrated circuit, method for manufacturing a cell, memory module' [patent_app_type] => utility [patent_app_number] => 11/728960 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6644 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20080237694.pdf [firstpage_image] =>[orig_patent_app_number] => 11728960 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/728960
Integrated circuit, cell, cell arrangement, method for manufacturing an integrated circuit, method for manufacturing a cell, memory module Mar 26, 2007 Abandoned
Array ( [id] => 592413 [patent_doc_number] => 07435987 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-10-14 [patent_title] => 'Forming a type I heterostructure in a group IV semiconductor' [patent_app_type] => utility [patent_app_number] => 11/728890 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2173 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/435/07435987.pdf [firstpage_image] =>[orig_patent_app_number] => 11728890 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/728890
Forming a type I heterostructure in a group IV semiconductor Mar 26, 2007 Issued
Array ( [id] => 4715216 [patent_doc_number] => 20080237738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'Integrated circuit, cell, cell arrangement, method for manufacturing an integrated circuit, method for manufacturing a cell arrangement; memory module' [patent_app_type] => utility [patent_app_number] => 11/728970 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8105 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20080237738.pdf [firstpage_image] =>[orig_patent_app_number] => 11728970 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/728970
Integrated circuit, cell, cell arrangement, method for manufacturing an integrated circuit, method for manufacturing a cell arrangement; memory module Mar 26, 2007 Abandoned
Array ( [id] => 5177575 [patent_doc_number] => 20070178635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-02 [patent_title] => 'Atomic layer deposition of metal oxide and/or low asymmetrical tunnel barrier interpoly insulators' [patent_app_type] => utility [patent_app_number] => 11/728671 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10768 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20070178635.pdf [firstpage_image] =>[orig_patent_app_number] => 11728671 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/728671
Atomic layer deposition of metal oxide and/or low asymmetrical tunnel barrier interpoly insulators Mar 26, 2007 Issued
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