Search

Robert A. Sorey

Examiner (ID: 16547, Phone: (571)270-3606 , Office: P/3626 )

Most Active Art Unit
3626
Art Unit(s)
3626, 3682
Total Applications
514
Issued Applications
231
Pending Applications
61
Abandoned Applications
235

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11036377 [patent_doc_number] => 20160233334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'SEMICONDUCTOR DEVICES WITH SHAPED PORTIONS OF ELEVATED SOURCE/DRAIN REGIONS' [patent_app_type] => utility [patent_app_number] => 14/963731 [patent_app_country] => US [patent_app_date] => 2015-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7041 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14963731 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/963731
Semiconductor devices with shaped portions of elevated source/drain regions Dec 8, 2015 Issued
Array ( [id] => 12346260 [patent_doc_number] => 09950921 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-24 [patent_title] => MEMS structure with improved shielding and method [patent_app_type] => utility [patent_app_number] => 14/930642 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2935 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14930642 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/930642
MEMS structure with improved shielding and method Nov 1, 2015 Issued
Array ( [id] => 11592996 [patent_doc_number] => 20170117408 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-27 [patent_title] => 'A METAL-OXIDE FIELD EFFECT TRANSISTOR HAVING AN OXIDE REGION WITHIN A LIGHTLY DOPED DRAIN REGION' [patent_app_type] => utility [patent_app_number] => 14/920426 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3633 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920426 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920426
Metal-oxide field effect transistor having an oxide region within a lightly doped drain region Oct 21, 2015 Issued
Array ( [id] => 10795260 [patent_doc_number] => 20160141417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/920267 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 11477 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920267 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920267
Fin-FET semiconductor device with a source/drain contact having varying different widths Oct 21, 2015 Issued
Array ( [id] => 13019529 [patent_doc_number] => 10032884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-24 [patent_title] => Unmerged epitaxial process for FinFET devices with aggressive fin pitch scaling [patent_app_type] => utility [patent_app_number] => 14/920354 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 3702 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920354 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920354
Unmerged epitaxial process for FinFET devices with aggressive fin pitch scaling Oct 21, 2015 Issued
Array ( [id] => 17470197 [patent_doc_number] => 11276680 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Power semiconductor device with integrated temperature protection [patent_app_type] => utility [patent_app_number] => 14/920374 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 8133 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920374 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920374
Power semiconductor device with integrated temperature protection Oct 21, 2015 Issued
Array ( [id] => 11489563 [patent_doc_number] => 09595637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-14 [patent_title] => 'Nanostructure semiconductor light emitting device having rod and capping layers of differing heights' [patent_app_type] => utility [patent_app_number] => 14/920509 [patent_app_country] => US [patent_app_date] => 2015-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 27 [patent_no_of_words] => 13899 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14920509 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/920509
Nanostructure semiconductor light emitting device having rod and capping layers of differing heights Oct 21, 2015 Issued
Array ( [id] => 11853347 [patent_doc_number] => 20170227839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'A SUPERLUMINESCENT LIGHT EMITTING DIODE (SLED) DEVICE' [patent_app_type] => utility [patent_app_number] => 15/519519 [patent_app_country] => US [patent_app_date] => 2015-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3948 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15519519 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/519519
Superluminescent light emitting diode (SLED) device Oct 18, 2015 Issued
Array ( [id] => 11571068 [patent_doc_number] => 20170109712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'SYSTEM AND METHOD FOR GENERATING MAINTENANCE SCHEDULE' [patent_app_type] => utility [patent_app_number] => 14/882499 [patent_app_country] => US [patent_app_date] => 2015-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5410 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14882499 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/882499
SYSTEM AND METHOD FOR GENERATING MAINTENANCE SCHEDULE Oct 13, 2015 Abandoned
Array ( [id] => 10659470 [patent_doc_number] => 20160005614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-07 [patent_title] => 'Spacer Etching Process for Integrated Circuit Design' [patent_app_type] => utility [patent_app_number] => 14/850764 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4145 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14850764 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/850764
Spacer etching process for integrated circuit design Sep 9, 2015 Issued
Array ( [id] => 11770292 [patent_doc_number] => 09378985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-06-28 [patent_title] => 'Method of thinning a wafer to provide a raised peripheral edge' [patent_app_type] => utility [patent_app_number] => 14/806993 [patent_app_country] => US [patent_app_date] => 2015-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 25 [patent_no_of_words] => 6832 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14806993 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/806993
Method of thinning a wafer to provide a raised peripheral edge Jul 22, 2015 Issued
Array ( [id] => 12436212 [patent_doc_number] => 09978587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-22 [patent_title] => Method of manufacturing semiconductor device including forming a film containing a first element, a second element and carbon, substrate processing apparatus, and recording medium [patent_app_type] => utility [patent_app_number] => 14/804604 [patent_app_country] => US [patent_app_date] => 2015-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 23112 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14804604 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/804604
Method of manufacturing semiconductor device including forming a film containing a first element, a second element and carbon, substrate processing apparatus, and recording medium Jul 20, 2015 Issued
Array ( [id] => 11403123 [patent_doc_number] => 20170023661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-26 [patent_title] => 'APPARATUS AND METHODS FOR DETECTION OF OBJECTS USING BROADBAND SIGNALS' [patent_app_type] => utility [patent_app_number] => 14/804043 [patent_app_country] => US [patent_app_date] => 2015-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9298 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14804043 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/804043
Apparatus and methods for detection of objects using broadband signals Jul 19, 2015 Issued
Array ( [id] => 10377802 [patent_doc_number] => 20150262809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-17 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SUBSTRATE PROCESSING APPARATUS, AND RECORDING MEDIUM' [patent_app_type] => utility [patent_app_number] => 14/725865 [patent_app_country] => US [patent_app_date] => 2015-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 31251 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14725865 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/725865
Method of manufacturing a SiOCN film, substrate processing apparatus, and recording medium May 28, 2015 Issued
Array ( [id] => 10638395 [patent_doc_number] => 09355905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-31 [patent_title] => 'Methods and structure for carrier-less thin wafer handling' [patent_app_type] => utility [patent_app_number] => 14/722672 [patent_app_country] => US [patent_app_date] => 2015-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 41 [patent_no_of_words] => 7515 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722672 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/722672
Methods and structure for carrier-less thin wafer handling May 26, 2015 Issued
Array ( [id] => 15922071 [patent_doc_number] => 10658284 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-19 [patent_title] => Shaped lead terminals for packaging a semiconductor device for electric power [patent_app_type] => utility [patent_app_number] => 15/124489 [patent_app_country] => US [patent_app_date] => 2015-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6103 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15124489 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/124489
Shaped lead terminals for packaging a semiconductor device for electric power May 14, 2015 Issued
Array ( [id] => 10350981 [patent_doc_number] => 20150235986 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'SELECTIVE AREA HEATING FOR 3D CHIP STACK' [patent_app_type] => utility [patent_app_number] => 14/705005 [patent_app_country] => US [patent_app_date] => 2015-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14705005 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/705005
Selective area heating for 3D chip stack May 5, 2015 Issued
Array ( [id] => 10358831 [patent_doc_number] => 20150243836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'METHOD FOR MAKING LIGHT EMITTING DIODES' [patent_app_type] => utility [patent_app_number] => 14/700116 [patent_app_country] => US [patent_app_date] => 2015-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6179 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14700116 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/700116
Method for making light emitting diodes Apr 28, 2015 Issued
Array ( [id] => 10486666 [patent_doc_number] => 20150371685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'Methods of Forming Semiconductor Devices to Include Single Body Interconnection Patterns Using Fine Patterning Techniques, and Semiconductor Device So Formed' [patent_app_type] => utility [patent_app_number] => 14/682132 [patent_app_country] => US [patent_app_date] => 2015-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 16009 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14682132 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/682132
Methods of forming semiconductor devices to include single body interconnection patterns using fine patterning techniques, and semiconductor device so formed Apr 8, 2015 Issued
Array ( [id] => 11246494 [patent_doc_number] => 09472544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Semiconductor device comprising electrostatic discharge protection structure' [patent_app_type] => utility [patent_app_number] => 14/682257 [patent_app_country] => US [patent_app_date] => 2015-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5545 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14682257 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/682257
Semiconductor device comprising electrostatic discharge protection structure Apr 8, 2015 Issued
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