Search

Robert Arthur Clemente

Examiner (ID: 12463)

Most Active Art Unit
1773
Art Unit(s)
1772, 1773, 1797, 1724, 1776, 1775
Total Applications
1722
Issued Applications
1360
Pending Applications
114
Abandoned Applications
279

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18208461 [patent_doc_number] => 20230054719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => GALLIUM NITRIDE (GAN) LAYER TRANSFER AND REGROWTH FOR INTEGRATED CIRCUIT TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 17/408025 [patent_app_country] => US [patent_app_date] => 2021-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15842 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17408025 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/408025
GALLIUM NITRIDE (GAN) LAYER TRANSFER AND REGROWTH FOR INTEGRATED CIRCUIT TECHNOLOGY Aug 19, 2021 Pending
Array ( [id] => 17431821 [patent_doc_number] => 20220059530 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/405606 [patent_app_country] => US [patent_app_date] => 2021-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14398 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17405606 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/405606
Semiconductor device with active pattern including a transition pattern and method for fabricating the same Aug 17, 2021 Issued
Array ( [id] => 18170039 [patent_doc_number] => 20230036650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SENSE LINES FOR HIGH-SPEED APPLICATION PACKAGES [patent_app_type] => utility [patent_app_number] => 17/386278 [patent_app_country] => US [patent_app_date] => 2021-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17386278 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/386278
SENSE LINES FOR HIGH-SPEED APPLICATION PACKAGES Jul 26, 2021 Pending
Array ( [id] => 18661259 [patent_doc_number] => 20230307272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => PROCESSING TASK START METHOD AND DEVICE IN SEMICONDUCTOR PROCESSING APPARATUS [patent_app_type] => utility [patent_app_number] => 18/041087 [patent_app_country] => US [patent_app_date] => 2021-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18041087 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/041087
Processing task start method and device in semiconductor processing apparatus Jul 25, 2021 Issued
Array ( [id] => 17793881 [patent_doc_number] => 20220252973 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => PELLICLE FOR EUV LITHOGRAPHY AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/375352 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375352 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375352
PELLICLE FOR EUV LITHOGRAPHY AND METHOD OF MANUFACTURING THE SAME Jul 13, 2021 Abandoned
Array ( [id] => 18140877 [patent_doc_number] => 20230014718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => SEMICONDUCTOR PACKAGE WITH TEMPERATURE SENSOR [patent_app_type] => utility [patent_app_number] => 17/376150 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4391 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17376150 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/376150
SEMICONDUCTOR PACKAGE WITH TEMPERATURE SENSOR Jul 13, 2021 Pending
Array ( [id] => 19031263 [patent_doc_number] => 11930638 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Nonvolatile memory device and memory system comprising the same [patent_app_type] => utility [patent_app_number] => 17/368029 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 10697 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 375 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368029 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368029
Nonvolatile memory device and memory system comprising the same Jul 5, 2021 Issued
Array ( [id] => 19936792 [patent_doc_number] => 12310012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-20 [patent_title] => Semiconductor device and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/368567 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 45 [patent_no_of_words] => 4702 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368567 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368567
Semiconductor device and method of manufacturing semiconductor device Jul 5, 2021 Issued
Array ( [id] => 19046686 [patent_doc_number] => 11935806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Semiconductor device and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 17/368608 [patent_app_country] => US [patent_app_date] => 2021-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 4841 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17368608 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/368608
Semiconductor device and method for manufacturing semiconductor device Jul 5, 2021 Issued
Array ( [id] => 18097754 [patent_doc_number] => 20220416095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => LOW-STRESS DIELECTRIC LAYER, PLANARIZATION METHOD, AND LOW-TEMPERATURE PROCESSING FOR 3D-INTEGRATED ELECTRICAL DEVICE [patent_app_type] => utility [patent_app_number] => 17/361859 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361859 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361859
LOW-STRESS DIELECTRIC LAYER, PLANARIZATION METHOD, AND LOW-TEMPERATURE PROCESSING FOR 3D-INTEGRATED ELECTRICAL DEVICE Jun 28, 2021 Pending
Array ( [id] => 17339496 [patent_doc_number] => 20220005827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => TECHNIQUES FOR MANUFACTURING SPLIT-CELL 3D-NAND MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/362557 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8722 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17362557 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/362557
TECHNIQUES FOR MANUFACTURING SPLIT-CELL 3D-NAND MEMORY DEVICES Jun 28, 2021 Pending
Array ( [id] => 20080800 [patent_doc_number] => 12354877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Vapor deposition of films comprising molybdenum [patent_app_type] => utility [patent_app_number] => 17/353262 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5950 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353262 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/353262
Vapor deposition of films comprising molybdenum Jun 20, 2021 Issued
Array ( [id] => 19509492 [patent_doc_number] => 12120934 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Electronic device including a protection layer [patent_app_type] => utility [patent_app_number] => 17/353719 [patent_app_country] => US [patent_app_date] => 2021-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 13774 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17353719 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/353719
Electronic device including a protection layer Jun 20, 2021 Issued
Array ( [id] => 17431770 [patent_doc_number] => 20220059479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-24 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/352009 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8436 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352009 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352009
Display panel including signal pads with varying dimensions Jun 17, 2021 Issued
Array ( [id] => 20496597 [patent_doc_number] => 12538486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Semiconductor memory device having first net-shaped source pattern, second source pattern and pad pattern therebetween [patent_app_type] => utility [patent_app_number] => 17/352003 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 7526 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352003 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352003
Semiconductor memory device having first net-shaped source pattern, second source pattern and pad pattern therebetween Jun 17, 2021 Issued
Array ( [id] => 20435949 [patent_doc_number] => 12507416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-23 [patent_title] => Memory device including memory blocks different from each other [patent_app_type] => utility [patent_app_number] => 17/350760 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 33 [patent_no_of_words] => 11641 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350760 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350760
Memory device including memory blocks different from each other Jun 16, 2021 Issued
Array ( [id] => 19340659 [patent_doc_number] => 12050850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-30 [patent_title] => Filler cells for integrated circuit design [patent_app_type] => utility [patent_app_number] => 17/349896 [patent_app_country] => US [patent_app_date] => 2021-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 7916 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17349896 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/349896
Filler cells for integrated circuit design Jun 15, 2021 Issued
Array ( [id] => 17855328 [patent_doc_number] => 20220285371 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/346344 [patent_app_country] => US [patent_app_date] => 2021-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17346344 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/346344
Semiconductor memory device having stack of polycrystalline semiconductor layers with diverse average crystal grain sizes Jun 13, 2021 Issued
Array ( [id] => 19973987 [patent_doc_number] => 12342621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Array panel, and display device having touch signal line, common electrode and pixel electrode sequentially stacked and overlapping sub-pixel opening area [patent_app_type] => utility [patent_app_number] => 17/775392 [patent_app_country] => US [patent_app_date] => 2021-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 15778 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 536 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17775392 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/775392
Array panel, and display device having touch signal line, common electrode and pixel electrode sequentially stacked and overlapping sub-pixel opening area May 27, 2021 Issued
Array ( [id] => 19781611 [patent_doc_number] => 12230649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => AI system on chip (SOC) for robotics vision applications [patent_app_type] => utility [patent_app_number] => 17/324964 [patent_app_country] => US [patent_app_date] => 2021-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9295 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/324964
AI system on chip (SOC) for robotics vision applications May 18, 2021 Issued
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