Search

Robert C Watson

Examiner (ID: 16862)

Most Active Art Unit
3203
Art Unit(s)
3203, 3723, 2103, 2901, 3727, 3104, 2899
Total Applications
4229
Issued Applications
3664
Pending Applications
83
Abandoned Applications
474

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12314973 [patent_doc_number] => 09941377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-10 [patent_title] => Semiconductor devices with wider field gates for reduced gate resistance [patent_app_type] => utility [patent_app_number] => 15/189325 [patent_app_country] => US [patent_app_date] => 2016-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5318 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15189325 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/189325
Semiconductor devices with wider field gates for reduced gate resistance Jun 21, 2016 Issued
Array ( [id] => 11475685 [patent_doc_number] => 20170062468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'NON-VOLATILE MEMORY DEVICE HAVING VERTICAL STRUCTURE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/189205 [patent_app_country] => US [patent_app_date] => 2016-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 12960 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15189205 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/189205
Non-volatile memory device having vertical structure and method of manufacturing the same Jun 21, 2016 Issued
Array ( [id] => 11760215 [patent_doc_number] => 20170207085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-20 [patent_title] => 'HORIZONTAL SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/188632 [patent_app_country] => US [patent_app_date] => 2016-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2808 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15188632 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/188632
HORIZONTAL SEMICONDUCTOR DEVICE Jun 20, 2016 Abandoned
Array ( [id] => 13709291 [patent_doc_number] => 20170365600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-21 [patent_title] => Using Inter-Tier Vias in Integrated Circuits [patent_app_type] => utility [patent_app_number] => 15/188544 [patent_app_country] => US [patent_app_date] => 2016-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9904 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15188544 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/188544
Using inter-tier vias in integrated circuits Jun 20, 2016 Issued
Array ( [id] => 11925621 [patent_doc_number] => 09793210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-17 [patent_title] => 'Power line layout structure of semiconductor device and method for forming the same' [patent_app_type] => utility [patent_app_number] => 15/188052 [patent_app_country] => US [patent_app_date] => 2016-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6857 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15188052 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/188052
Power line layout structure of semiconductor device and method for forming the same Jun 20, 2016 Issued
Array ( [id] => 11517599 [patent_doc_number] => 20170084673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-23 [patent_title] => 'FOLDABLE DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/188813 [patent_app_country] => US [patent_app_date] => 2016-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5385 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15188813 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/188813
Foldable display apparatus and method of manufacturing the same Jun 20, 2016 Issued
Array ( [id] => 11096737 [patent_doc_number] => 20160293706 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'FINFET SEMICONDUCTOR DEVICES WITH STRESSED CHANNEL REGIONS' [patent_app_type] => utility [patent_app_number] => 15/186632 [patent_app_country] => US [patent_app_date] => 2016-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 7501 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15186632 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/186632
FINFET SEMICONDUCTOR DEVICES WITH STRESSED CHANNEL REGIONS Jun 19, 2016 Abandoned
Array ( [id] => 12530859 [patent_doc_number] => 10007137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-26 [patent_title] => Optical device package [patent_app_type] => utility [patent_app_number] => 15/501258 [patent_app_country] => US [patent_app_date] => 2016-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5501 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15501258 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/501258
Optical device package Mar 22, 2016 Issued
Array ( [id] => 11088012 [patent_doc_number] => 20160284980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 15/060820 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 34 [patent_no_of_words] => 15907 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060820 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060820
Semiconductor device and method of manufacturing same Mar 3, 2016 Issued
Array ( [id] => 11123703 [patent_doc_number] => 20160320676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'LIQUID CRYSTAL DISPLAY' [patent_app_type] => utility [patent_app_number] => 15/060898 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 10464 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060898 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060898
Liquid crystal display Mar 3, 2016 Issued
Array ( [id] => 11817925 [patent_doc_number] => 09721883 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-08-01 [patent_title] => 'Integrated circuit and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 15/060612 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4983 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060612 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060612
Integrated circuit and manufacturing method thereof Mar 3, 2016 Issued
Array ( [id] => 11495437 [patent_doc_number] => 20170069622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'POWER SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/061017 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3308 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15061017 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/061017
Power semiconductor device Mar 3, 2016 Issued
Array ( [id] => 11273939 [patent_doc_number] => 20160336486 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-17 [patent_title] => 'MICRO-LIGHT-EMITTING DIODE DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/060885 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 9169 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060885 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060885
Micro-light-emitting diode device and method for manufacturing the same Mar 3, 2016 Issued
Array ( [id] => 11063688 [patent_doc_number] => 20160260650 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'SEMICONDUCTOR MODULE' [patent_app_type] => utility [patent_app_number] => 15/060855 [patent_app_country] => US [patent_app_date] => 2016-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4394 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060855 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060855
SEMICONDUCTOR MODULE Mar 3, 2016 Abandoned
Array ( [id] => 11539480 [patent_doc_number] => 09613895 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-04-04 [patent_title] => 'Semiconductor package with double side molding' [patent_app_type] => utility [patent_app_number] => 15/060577 [patent_app_country] => US [patent_app_date] => 2016-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 3646 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15060577 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/060577
Semiconductor package with double side molding Mar 2, 2016 Issued
Array ( [id] => 11840339 [patent_doc_number] => 20170222058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-03 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/501256 [patent_app_country] => US [patent_app_date] => 2016-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 20727 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15501256 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/501256
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME Feb 4, 2016 Abandoned
Array ( [id] => 10795135 [patent_doc_number] => 20160141292 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-19 [patent_title] => 'CMOS Gate Stack Structures and Processes' [patent_app_type] => utility [patent_app_number] => 15/003151 [patent_app_country] => US [patent_app_date] => 2016-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8865 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15003151 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/003151
CMOS gate stack structures and processes Jan 20, 2016 Issued
Array ( [id] => 11307576 [patent_doc_number] => 09514981 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-12-06 [patent_title] => 'Interconnect structure' [patent_app_type] => utility [patent_app_number] => 14/970687 [patent_app_country] => US [patent_app_date] => 2015-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3821 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 463 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14970687 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/970687
Interconnect structure Dec 15, 2015 Issued
Array ( [id] => 11694561 [patent_doc_number] => 20170170278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'INTEGRATED CIRCUIT STRUCTURE AND METHOD WITH SOLID PHASE DIFFUSION' [patent_app_type] => utility [patent_app_number] => 14/969077 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8870 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969077 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/969077
Integrated circuit structure and method with solid phase diffusion Dec 14, 2015 Issued
Array ( [id] => 11740271 [patent_doc_number] => 09704865 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-11 [patent_title] => 'Semiconductor devices having silicide and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/969319 [patent_app_country] => US [patent_app_date] => 2015-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 45 [patent_no_of_words] => 13294 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14969319 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/969319
Semiconductor devices having silicide and methods of manufacturing the same Dec 14, 2015 Issued
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