Robert E. Fennema

Array ( [id] => 4793896 [patent_doc_number] => 20080294870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-27 [patent_title] => 'SWITCH MEMORY ARCHITECTURES' [patent_app_type] => utility [patent_app_number] => 12/189493 [patent_app_country] => US [patent_app_date] => 2008-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11712 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20080294870.pdf [firstpage_image] =>[orig_patent_app_number] => 12189493 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4780746 [patent_doc_number] => 20080288745 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'GENERATING PREDICATE VALUES DURING VECTOR PROCESSING' [patent_app_type] => utility [patent_app_number] => 12/172169 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8568 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20080288745.pdf [firstpage_image] =>[orig_patent_app_number] => 12172169 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7542879 [patent_doc_number] => 08060728 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-15 [patent_title] => 'Generating stop indicators during vector processing' [patent_app_type] => utility [patent_app_number] => 12/172161 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 8594 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/060/08060728.pdf [firstpage_image] =>[orig_patent_app_number] => 12172161 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4780745 [patent_doc_number] => 20080288744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'DETECTING MEMORY-HAZARD CONFLICTS DURING VECTOR PROCESSING' [patent_app_type] => utility [patent_app_number] => 12/172173 [patent_app_country] => US [patent_app_date] => 2008-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8838 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0288/20080288744.pdf [firstpage_image] =>[orig_patent_app_number] => 12172173 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4862156 [patent_doc_number] => 20080270754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-30 [patent_title] => 'USING FIELD PROGRAMMABLE GATE ARRAY (FPGA) TECHNOLOGY WITH A MICROPROCESSOR FOR RECONFIGURABLE, INSTRUCTION LEVEL HARDWARE ACCELERATION' [patent_app_type] => utility [patent_app_number] => 12/167202 [patent_app_country] => US [patent_app_date] => 2008-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2899 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0270/20080270754.pdf [firstpage_image] =>[orig_patent_app_number] => 12167202 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7746795 [patent_doc_number] => 08108867 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-31 [patent_title] => 'Preserving hardware thread cache affinity via procrastination' [patent_app_type] => utility [patent_app_number] => 12/215154 [patent_app_country] => US [patent_app_date] => 2008-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5809 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/108/08108867.pdf [firstpage_image] =>[orig_patent_app_number] => 12215154 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5399959 [patent_doc_number] => 20090320022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'File System Object Node Management' [patent_app_type] => utility [patent_app_number] => 12/142418 [patent_app_country] => US [patent_app_date] => 2008-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5954 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20090320022.pdf [firstpage_image] =>[orig_patent_app_number] => 12142418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4854745 [patent_doc_number] => 20080320489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'LOAD BALANCING' [patent_app_type] => utility [patent_app_number] => 12/142379 [patent_app_country] => US [patent_app_date] => 2008-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1705 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20080320489.pdf [firstpage_image] =>[orig_patent_app_number] => 12142379 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5399968 [patent_doc_number] => 20090320031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'Power state-aware thread scheduling mechanism' [patent_app_type] => utility [patent_app_number] => 12/214523 [patent_app_country] => US [patent_app_date] => 2008-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8019 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20090320031.pdf [firstpage_image] =>[orig_patent_app_number] => 12214523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5399965 [patent_doc_number] => 20090320028 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'SYSTEM AND METHOD FOR LOAD-ADAPTIVE MUTUAL EXCLUSION WITH WAITING PROCESS COUNTS' [patent_app_type] => utility [patent_app_number] => 12/141269 [patent_app_country] => US [patent_app_date] => 2008-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5034 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20090320028.pdf [firstpage_image] =>[orig_patent_app_number] => 12141269 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8120513 [patent_doc_number] => 08161479 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Synchronizing virtual machine and application life cycles' [patent_app_type] => utility [patent_app_number] => 12/138591 [patent_app_country] => US [patent_app_date] => 2008-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7251 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/161/08161479.pdf [firstpage_image] =>[orig_patent_app_number] => 12138591 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6356670 [patent_doc_number] => 20100249955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'RESOURCE CONSUMPTION CONTROL APPARATUS AND METHODS' [patent_app_type] => utility [patent_app_number] => 12/665378 [patent_app_country] => US [patent_app_date] => 2008-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 12437 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0249/20100249955.pdf [firstpage_image] =>[orig_patent_app_number] => 12665378 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7547900 [patent_doc_number] => 08055881 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-11-08 [patent_title] => 'Computing nodes for executing groups of instructions' [patent_app_type] => utility [patent_app_number] => 12/136645 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5614 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/055/08055881.pdf [firstpage_image] =>[orig_patent_app_number] => 12136645 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5370148 [patent_doc_number] => 20090307707 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'SYSTEM AND METHOD FOR DYNAMICALLY ADAPTIVE MUTUAL EXCLUSION IN MULTI-THREADED COMPUTING ENVIRONMENT' [patent_app_type] => utility [patent_app_number] => 12/135616 [patent_app_country] => US [patent_app_date] => 2008-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4397 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0307/20090307707.pdf [firstpage_image] =>[orig_patent_app_number] => 12135616 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5370134 [patent_doc_number] => 20090307693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'SYSTEM AND METHOD TO DYNAMICALLY MANAGE APPLICATIONS ON A PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/133252 [patent_app_country] => US [patent_app_date] => 2008-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7702 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0307/20090307693.pdf [firstpage_image] =>[orig_patent_app_number] => 12133252 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5370133 [patent_doc_number] => 20090307692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'SYSTEM AND METHOD TO DYNAMICALLY MANAGE APPLICATIONS ON A PROCESSING SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/132823 [patent_app_country] => US [patent_app_date] => 2008-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7701 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0307/20090307692.pdf [firstpage_image] =>[orig_patent_app_number] => 12132823 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9834663 [patent_doc_number] => 08943497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-27 [patent_title] => 'Managing subscriptions for cloud-based virtual machines' [patent_app_type] => utility [patent_app_number] => 12/128915 [patent_app_country] => US [patent_app_date] => 2008-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6686 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12128915 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5541028 [patent_doc_number] => 20090222833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-03 [patent_title] => 'CODELESS PROVISIONING SYNC RULES' [patent_app_type] => utility [patent_app_number] => 12/120136 [patent_app_country] => US [patent_app_date] => 2008-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7246 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20090222833.pdf [firstpage_image] =>[orig_patent_app_number] => 12120136 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4837688 [patent_doc_number] => 20080278195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-13 [patent_title] => 'STRUCTURE FOR EXECUTING SOFTWARE WITHIN REAL-TIME HARDWARE CONSTRAINTS USING FUNCTIONALLY PROGRAMMABLE BRANCH TABLE' [patent_app_type] => utility [patent_app_number] => 12/118234 [patent_app_country] => US [patent_app_date] => 2008-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5037 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20080278195.pdf [firstpage_image] =>[orig_patent_app_number] => 12118234 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4874881 [patent_doc_number] => 20080201615 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'APPARATUS AND COMPUTER PROGRAM PRODUCT FOR IMPLEMENTING ATOMIC DATA TRACING' [patent_app_type] => utility [patent_app_number] => 12/110451 [patent_app_country] => US [patent_app_date] => 2008-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3057 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20080201615.pdf [firstpage_image] =>[orig_patent_app_number] => 12110451 [rel_patent_id] =>[rel_patent_doc_number] =>)