Search

Robert E. Tallman

Examiner (ID: 6476, Phone: (571)270-3958 , Office: P/2872 )

Most Active Art Unit
2872
Art Unit(s)
2872
Total Applications
927
Issued Applications
717
Pending Applications
91
Abandoned Applications
143

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5051453 [patent_doc_number] => 20070031998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-02-08 [patent_title] => 'Method and apparatus for removing encapsulating material from a packaged microelectronic device' [patent_app_type] => utility [patent_app_number] => 11/580451 [patent_app_country] => US [patent_app_date] => 2006-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4509 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20070031998.pdf [firstpage_image] =>[orig_patent_app_number] => 11580451 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/580451
Method and apparatus for removing encapsulating material from a packaged microelectronic device Oct 11, 2006 Abandoned
Array ( [id] => 8005483 [patent_doc_number] => 08084142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-27 [patent_title] => 'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects' [patent_app_type] => utility [patent_app_number] => 11/525762 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4685 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/084/08084142.pdf [firstpage_image] =>[orig_patent_app_number] => 11525762 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/525762
Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects Sep 20, 2006 Issued
Array ( [id] => 259985 [patent_doc_number] => 07572710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-11 [patent_title] => 'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects' [patent_app_type] => utility [patent_app_number] => 11/525707 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 4688 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/572/07572710.pdf [firstpage_image] =>[orig_patent_app_number] => 11525707 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/525707
Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects Sep 20, 2006 Issued
Array ( [id] => 4936437 [patent_doc_number] => 20080073751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-27 [patent_title] => 'Memory cell and method of manufacturing thereof' [patent_app_type] => utility [patent_app_number] => 11/525196 [patent_app_country] => US [patent_app_date] => 2006-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3428 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20080073751.pdf [firstpage_image] =>[orig_patent_app_number] => 11525196 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/525196
Memory cell and method of manufacturing thereof Sep 20, 2006 Abandoned
Array ( [id] => 4919339 [patent_doc_number] => 20080067651 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-20 [patent_title] => 'METHOD AND APPARATUS FOR PREVENTION OF SOLDER CORROSION UTILIZING FORCED AIR' [patent_app_type] => utility [patent_app_number] => 11/532396 [patent_app_country] => US [patent_app_date] => 2006-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2076 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0067/20080067651.pdf [firstpage_image] =>[orig_patent_app_number] => 11532396 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/532396
METHOD AND APPARATUS FOR PREVENTION OF SOLDER CORROSION UTILIZING FORCED AIR Sep 14, 2006 Abandoned
Array ( [id] => 860324 [patent_doc_number] => 07371667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-05-13 [patent_title] => 'Semiconductor device and method of fabricating same' [patent_app_type] => utility [patent_app_number] => 11/520590 [patent_app_country] => US [patent_app_date] => 2006-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 29 [patent_no_of_words] => 4295 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/371/07371667.pdf [firstpage_image] =>[orig_patent_app_number] => 11520590 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/520590
Semiconductor device and method of fabricating same Sep 13, 2006 Issued
Array ( [id] => 5141877 [patent_doc_number] => 20070004093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-04 [patent_title] => 'METHOD OF FABRICATING A HIGH-DENSITY LEAD ARRANGEMENT PACKAGE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 11/530036 [patent_app_country] => US [patent_app_date] => 2006-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2892 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20070004093.pdf [firstpage_image] =>[orig_patent_app_number] => 11530036 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/530036
METHOD OF FABRICATING A HIGH-DENSITY LEAD ARRANGEMENT PACKAGE STRUCTURE Sep 7, 2006 Abandoned
Array ( [id] => 4731275 [patent_doc_number] => 20080048298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-28 [patent_title] => 'Semiconductor devices, assemblies and constructions, and methods of forming semiconductor devices, assemblies and constructions' [patent_app_type] => utility [patent_app_number] => 11/511596 [patent_app_country] => US [patent_app_date] => 2006-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 5694 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20080048298.pdf [firstpage_image] =>[orig_patent_app_number] => 11511596 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/511596
Methods of forming semiconductor devices, assemblies and constructions Aug 27, 2006 Issued
Array ( [id] => 5171986 [patent_doc_number] => 20070072419 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-29 [patent_title] => 'Chip, ship stack, and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/499116 [patent_app_country] => US [patent_app_date] => 2006-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2545 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20070072419.pdf [firstpage_image] =>[orig_patent_app_number] => 11499116 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/499116
Method of manufacturing a chip Aug 2, 2006 Issued
Array ( [id] => 5732935 [patent_doc_number] => 20060258052 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'WAFER LEVEL PRE-PACKAGED FLIP CHIP' [patent_app_type] => utility [patent_app_number] => 11/460089 [patent_app_country] => US [patent_app_date] => 2006-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6032 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20060258052.pdf [firstpage_image] =>[orig_patent_app_number] => 11460089 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/460089
Wafer level pre-packaged flip chip Jul 25, 2006 Issued
Array ( [id] => 4968581 [patent_doc_number] => 20070108583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-05-17 [patent_title] => 'INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/458065 [patent_app_country] => US [patent_app_date] => 2006-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3122 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20070108583.pdf [firstpage_image] =>[orig_patent_app_number] => 11458065 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/458065
INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM Jul 16, 2006 Abandoned
Array ( [id] => 5729605 [patent_doc_number] => 20060254719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-16 [patent_title] => 'Structure of disturbing plate having bent-down part' [patent_app_type] => utility [patent_app_number] => 11/487055 [patent_app_country] => US [patent_app_date] => 2006-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5158 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0254/20060254719.pdf [firstpage_image] =>[orig_patent_app_number] => 11487055 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/487055
Structure of disturbing plate having bent-down part Jul 12, 2006 Abandoned
Array ( [id] => 4992299 [patent_doc_number] => 20070007643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-11 [patent_title] => 'SEMICONDUCTOR MULTI-CHIP PACKAGE' [patent_app_type] => utility [patent_app_number] => 11/428795 [patent_app_country] => US [patent_app_date] => 2006-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2533 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20070007643.pdf [firstpage_image] =>[orig_patent_app_number] => 11428795 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/428795
SEMICONDUCTOR MULTI-CHIP PACKAGE Jul 4, 2006 Abandoned
Array ( [id] => 5834866 [patent_doc_number] => 20060246697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects' [patent_app_type] => utility [patent_app_number] => 11/478715 [patent_app_country] => US [patent_app_date] => 2006-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4640 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20060246697.pdf [firstpage_image] =>[orig_patent_app_number] => 11478715 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/478715
Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects Jun 29, 2006 Issued
Array ( [id] => 5834793 [patent_doc_number] => 20060246624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Semiconductor device with semiconductor chip and rewiring layer and method for producing the same' [patent_app_type] => utility [patent_app_number] => 11/476046 [patent_app_country] => US [patent_app_date] => 2006-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5079 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20060246624.pdf [firstpage_image] =>[orig_patent_app_number] => 11476046 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/476046
Semiconductor device with semiconductor chip and rewiring layer and method for producing the same Jun 27, 2006 Issued
Array ( [id] => 8578311 [patent_doc_number] => 08344524 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Wire bonding method for preventing polymer cracking' [patent_app_type] => utility [patent_app_number] => 11/425155 [patent_app_country] => US [patent_app_date] => 2006-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6095 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11425155 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/425155
Wire bonding method for preventing polymer cracking Jun 19, 2006 Issued
Array ( [id] => 7729299 [patent_doc_number] => 08101432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-24 [patent_title] => 'Method of repairing an image display unit' [patent_app_type] => utility [patent_app_number] => 11/424168 [patent_app_country] => US [patent_app_date] => 2006-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 43 [patent_no_of_words] => 10216 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/101/08101432.pdf [firstpage_image] =>[orig_patent_app_number] => 11424168 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/424168
Method of repairing an image display unit Jun 13, 2006 Issued
Array ( [id] => 7589142 [patent_doc_number] => 07663201 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-02-16 [patent_title] => 'Semiconductor device with a diffusion barrier film having a spacing for stress relief of solder bump' [patent_app_type] => utility [patent_app_number] => 11/447966 [patent_app_country] => US [patent_app_date] => 2006-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 4878 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/663/07663201.pdf [firstpage_image] =>[orig_patent_app_number] => 11447966 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/447966
Semiconductor device with a diffusion barrier film having a spacing for stress relief of solder bump Jun 6, 2006 Issued
Array ( [id] => 589228 [patent_doc_number] => 07443040 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-28 [patent_title] => 'Aluminum cap with electroless nickel/immersion gold' [patent_app_type] => utility [patent_app_number] => 11/422585 [patent_app_country] => US [patent_app_date] => 2006-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 1344 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/443/07443040.pdf [firstpage_image] =>[orig_patent_app_number] => 11422585 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/422585
Aluminum cap with electroless nickel/immersion gold Jun 5, 2006 Issued
Array ( [id] => 4511105 [patent_doc_number] => 07915746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'Semiconductor wafer, and semiconductor device formed therefrom' [patent_app_type] => utility [patent_app_number] => 11/441196 [patent_app_country] => US [patent_app_date] => 2006-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 4929 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/915/07915746.pdf [firstpage_image] =>[orig_patent_app_number] => 11441196 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/441196
Semiconductor wafer, and semiconductor device formed therefrom May 25, 2006 Issued
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