
Robert E. Tallman
Examiner (ID: 6476, Phone: (571)270-3958 , Office: P/2872 )
| Most Active Art Unit | 2872 |
| Art Unit(s) | 2872 |
| Total Applications | 927 |
| Issued Applications | 717 |
| Pending Applications | 91 |
| Abandoned Applications | 143 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5051453
[patent_doc_number] => 20070031998
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-08
[patent_title] => 'Method and apparatus for removing encapsulating material from a packaged microelectronic device'
[patent_app_type] => utility
[patent_app_number] => 11/580451
[patent_app_country] => US
[patent_app_date] => 2006-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0031/20070031998.pdf
[firstpage_image] =>[orig_patent_app_number] => 11580451
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/580451 | Method and apparatus for removing encapsulating material from a packaged microelectronic device | Oct 11, 2006 | Abandoned |
Array
(
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[patent_doc_number] => 08084142
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-12-27
[patent_title] => 'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects'
[patent_app_type] => utility
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[patent_app_date] => 2006-09-21
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[pdf_file] => patents/08/084/08084142.pdf
[firstpage_image] =>[orig_patent_app_number] => 11525762
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Array
(
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[patent_issue_date] => 2009-08-11
[patent_title] => 'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects'
[patent_app_type] => utility
[patent_app_number] => 11/525707
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Array
(
[id] => 4936437
[patent_doc_number] => 20080073751
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[patent_kind] => A1
[patent_issue_date] => 2008-03-27
[patent_title] => 'Memory cell and method of manufacturing thereof'
[patent_app_type] => utility
[patent_app_number] => 11/525196
[patent_app_country] => US
[patent_app_date] => 2006-09-21
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/525196 | Memory cell and method of manufacturing thereof | Sep 20, 2006 | Abandoned |
Array
(
[id] => 4919339
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[patent_kind] => A1
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[patent_title] => 'METHOD AND APPARATUS FOR PREVENTION OF SOLDER CORROSION UTILIZING FORCED AIR'
[patent_app_type] => utility
[patent_app_number] => 11/532396
[patent_app_country] => US
[patent_app_date] => 2006-09-15
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/532396 | METHOD AND APPARATUS FOR PREVENTION OF SOLDER CORROSION UTILIZING FORCED AIR | Sep 14, 2006 | Abandoned |
Array
(
[id] => 860324
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[patent_country] => US
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[patent_issue_date] => 2008-05-13
[patent_title] => 'Semiconductor device and method of fabricating same'
[patent_app_type] => utility
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Array
(
[id] => 5141877
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[patent_issue_date] => 2007-01-04
[patent_title] => 'METHOD OF FABRICATING A HIGH-DENSITY LEAD ARRANGEMENT PACKAGE STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 11/530036
[patent_app_country] => US
[patent_app_date] => 2006-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 2892
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[pdf_file] => publications/A1/0004/20070004093.pdf
[firstpage_image] =>[orig_patent_app_number] => 11530036
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/530036 | METHOD OF FABRICATING A HIGH-DENSITY LEAD ARRANGEMENT PACKAGE STRUCTURE | Sep 7, 2006 | Abandoned |
Array
(
[id] => 4731275
[patent_doc_number] => 20080048298
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-28
[patent_title] => 'Semiconductor devices, assemblies and constructions, and methods of forming semiconductor devices, assemblies and constructions'
[patent_app_type] => utility
[patent_app_number] => 11/511596
[patent_app_country] => US
[patent_app_date] => 2006-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
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[firstpage_image] =>[orig_patent_app_number] => 11511596
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Array
(
[id] => 5171986
[patent_doc_number] => 20070072419
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-29
[patent_title] => 'Chip, ship stack, and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/499116
[patent_app_country] => US
[patent_app_date] => 2006-08-03
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[firstpage_image] =>[orig_patent_app_number] => 11499116
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/499116 | Method of manufacturing a chip | Aug 2, 2006 | Issued |
Array
(
[id] => 5732935
[patent_doc_number] => 20060258052
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-16
[patent_title] => 'WAFER LEVEL PRE-PACKAGED FLIP CHIP'
[patent_app_type] => utility
[patent_app_number] => 11/460089
[patent_app_country] => US
[patent_app_date] => 2006-07-26
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11460089
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/460089 | Wafer level pre-packaged flip chip | Jul 25, 2006 | Issued |
Array
(
[id] => 4968581
[patent_doc_number] => 20070108583
[patent_country] => US
[patent_kind] => A1
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[patent_title] => 'INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 11/458065
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/458065 | INTEGRATED CIRCUIT PACKAGE-ON-PACKAGE STACKING SYSTEM | Jul 16, 2006 | Abandoned |
Array
(
[id] => 5729605
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[patent_issue_date] => 2006-11-16
[patent_title] => 'Structure of disturbing plate having bent-down part'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/487055 | Structure of disturbing plate having bent-down part | Jul 12, 2006 | Abandoned |
Array
(
[id] => 4992299
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[patent_title] => 'SEMICONDUCTOR MULTI-CHIP PACKAGE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/428795 | SEMICONDUCTOR MULTI-CHIP PACKAGE | Jul 4, 2006 | Abandoned |
Array
(
[id] => 5834866
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[patent_title] => 'Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects'
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Array
(
[id] => 5834793
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[patent_title] => 'Semiconductor device with semiconductor chip and rewiring layer and method for producing the same'
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Array
(
[id] => 8578311
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[patent_issue_date] => 2013-01-01
[patent_title] => 'Wire bonding method for preventing polymer cracking'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/425155 | Wire bonding method for preventing polymer cracking | Jun 19, 2006 | Issued |
Array
(
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Array
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/441196 | Semiconductor wafer, and semiconductor device formed therefrom | May 25, 2006 | Issued |