Search

Robert Edward Fuller

Examiner (ID: 19273, Phone: (571)272-6300 , Office: P/3676 )

Most Active Art Unit
3676
Art Unit(s)
3676, 3672
Total Applications
1121
Issued Applications
829
Pending Applications
108
Abandoned Applications
206

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6330826 [patent_doc_number] => 20100115166 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-05-06 [patent_title] => 'CONTROL OF AN ACTUATOR-SENSOR-INTERFACE COMPATIBLE DEVICE USING A REMOTE INTELLIGENCE DEVICE' [patent_app_type] => utility [patent_app_number] => 12/265267 [patent_app_country] => US [patent_app_date] => 2008-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2934 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20100115166.pdf [firstpage_image] =>[orig_patent_app_number] => 12265267 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/265267
Control of an actuator-sensor-interface compatible device using a remote intelligence device Nov 4, 2008 Issued
Array ( [id] => 5387489 [patent_doc_number] => 20090228734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-10 [patent_title] => 'Electronic device and system start method' [patent_app_type] => utility [patent_app_number] => 12/289468 [patent_app_country] => US [patent_app_date] => 2008-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6380 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20090228734.pdf [firstpage_image] =>[orig_patent_app_number] => 12289468 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/289468
Electronic device and system start method Oct 27, 2008 Abandoned
Array ( [id] => 6509972 [patent_doc_number] => 20100095032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-04-15 [patent_title] => 'USE OF COMPLETER KNOWLEDGE OF MEMORY REGION ORDERING REQUIREMENTS TO MODIFY TRANSACTION ATTRIBUTES' [patent_app_type] => utility [patent_app_number] => 12/252303 [patent_app_country] => US [patent_app_date] => 2008-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2098 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20100095032.pdf [firstpage_image] =>[orig_patent_app_number] => 12252303 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/252303
Use of completer knowledge of memory region ordering requirements to modify transaction attributes Oct 14, 2008 Issued
Array ( [id] => 7779965 [patent_doc_number] => 08122270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-21 [patent_title] => 'Voltage stabilization for clock signal frequency locking' [patent_app_type] => utility [patent_app_number] => 12/286190 [patent_app_country] => US [patent_app_date] => 2008-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4107 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/122/08122270.pdf [firstpage_image] =>[orig_patent_app_number] => 12286190 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/286190
Voltage stabilization for clock signal frequency locking Sep 28, 2008 Issued
Array ( [id] => 6355394 [patent_doc_number] => 20100073044 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'SYNCHRONIZING TIMING DOMAINS BASED ON STATE VARIABLES' [patent_app_type] => utility [patent_app_number] => 12/238274 [patent_app_country] => US [patent_app_date] => 2008-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5238 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20100073044.pdf [firstpage_image] =>[orig_patent_app_number] => 12238274 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/238274
Synchronizing timing domains based on state variables Sep 24, 2008 Issued
Array ( [id] => 6384369 [patent_doc_number] => 20100077238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-03-25 [patent_title] => 'ENERGY EFFICIENCT POWER SUPPLY SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/238297 [patent_app_country] => US [patent_app_date] => 2008-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3844 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20100077238.pdf [firstpage_image] =>[orig_patent_app_number] => 12238297 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/238297
ENERGY EFFICIENCT POWER SUPPLY SYSTEM Sep 24, 2008 Abandoned
Array ( [id] => 66364 [patent_doc_number] => 07765349 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-07-27 [patent_title] => 'Apparatus and method for arbitrating heterogeneous agents in on-chip busses' [patent_app_type] => utility [patent_app_number] => 12/284396 [patent_app_country] => US [patent_app_date] => 2008-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 4058 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/765/07765349.pdf [firstpage_image] =>[orig_patent_app_number] => 12284396 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/284396
Apparatus and method for arbitrating heterogeneous agents in on-chip busses Sep 21, 2008 Issued
Array ( [id] => 27242 [patent_doc_number] => 07802048 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-21 [patent_title] => 'Smart translator box for AGM-65 aircraft “Maverick” analog interface to MIL-STD-1760 store digital interface' [patent_app_type] => utility [patent_app_number] => 12/210480 [patent_app_country] => US [patent_app_date] => 2008-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 5150 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/802/07802048.pdf [firstpage_image] =>[orig_patent_app_number] => 12210480 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/210480
Smart translator box for AGM-65 aircraft “Maverick” analog interface to MIL-STD-1760 store digital interface Sep 14, 2008 Issued
Array ( [id] => 8022711 [patent_doc_number] => 08140874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Integrated device, layout method thereof, and program' [patent_app_type] => utility [patent_app_number] => 12/283057 [patent_app_country] => US [patent_app_date] => 2008-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 54 [patent_no_of_words] => 13638 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/140/08140874.pdf [firstpage_image] =>[orig_patent_app_number] => 12283057 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/283057
Integrated device, layout method thereof, and program Sep 8, 2008 Issued
Array ( [id] => 4854550 [patent_doc_number] => 20080320293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'CONFIGURABLE PROCESSING CORE' [patent_app_type] => utility [patent_app_number] => 12/202259 [patent_app_country] => US [patent_app_date] => 2008-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5697 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0320/20080320293.pdf [firstpage_image] =>[orig_patent_app_number] => 12202259 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/202259
CONFIGURABLE PROCESSING CORE Aug 29, 2008 Abandoned
Array ( [id] => 8645669 [patent_doc_number] => 08370669 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-05 [patent_title] => 'Memory device having a memory sleep logic and methods therefor' [patent_app_type] => utility [patent_app_number] => 12/201695 [patent_app_country] => US [patent_app_date] => 2008-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4156 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12201695 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/201695
Memory device having a memory sleep logic and methods therefor Aug 28, 2008 Issued
Array ( [id] => 8728370 [patent_doc_number] => 08407511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-26 [patent_title] => 'Method and apparatus for generating early or late sampling clocks for CDR data recovery' [patent_app_type] => utility [patent_app_number] => 12/199904 [patent_app_country] => US [patent_app_date] => 2008-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3972 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12199904 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/199904
Method and apparatus for generating early or late sampling clocks for CDR data recovery Aug 27, 2008 Issued
Array ( [id] => 5280715 [patent_doc_number] => 20090132847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'Information processing apparatus having memory clock setting function and memory clock setting method' [patent_app_type] => utility [patent_app_number] => 12/230411 [patent_app_country] => US [patent_app_date] => 2008-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3967 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20090132847.pdf [firstpage_image] =>[orig_patent_app_number] => 12230411 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/230411
Information processing apparatus having memory clock setting function and memory clock setting method Aug 27, 2008 Abandoned
Array ( [id] => 8285720 [patent_doc_number] => 08219835 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-07-10 [patent_title] => 'Power conservation in a data communication network' [patent_app_type] => utility [patent_app_number] => 12/199361 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4208 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12199361 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/199361
Power conservation in a data communication network Aug 26, 2008 Issued
Array ( [id] => 5273624 [patent_doc_number] => 20090077400 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'POWER CONTROL SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/198414 [patent_app_country] => US [patent_app_date] => 2008-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8446 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20090077400.pdf [firstpage_image] =>[orig_patent_app_number] => 12198414 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/198414
Power control system Aug 25, 2008 Issued
Array ( [id] => 5273634 [patent_doc_number] => 20090077410 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-19 [patent_title] => 'METHOD FOR SETTING ACTUAL OPERTATION FREQUENCY OF MEMORY AND SETTING MODULE THEREOF' [patent_app_type] => utility [patent_app_number] => 12/198075 [patent_app_country] => US [patent_app_date] => 2008-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3172 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20090077410.pdf [firstpage_image] =>[orig_patent_app_number] => 12198075 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/198075
METHOD FOR SETTING ACTUAL OPERTATION FREQUENCY OF MEMORY AND SETTING MODULE THEREOF Aug 24, 2008 Abandoned
Array ( [id] => 5426324 [patent_doc_number] => 20090085634 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-02 [patent_title] => 'METHOD FOR OPTIMIZING OF COMMUNICATION SIGNAL' [patent_app_type] => utility [patent_app_number] => 12/183827 [patent_app_country] => US [patent_app_date] => 2008-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4530 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0085/20090085634.pdf [firstpage_image] =>[orig_patent_app_number] => 12183827 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/183827
Method for optimizing of communication signal Jul 30, 2008 Issued
Array ( [id] => 5587265 [patent_doc_number] => 20090106467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-23 [patent_title] => 'MULTIPROCESSOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/175700 [patent_app_country] => US [patent_app_date] => 2008-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7507 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0106/20090106467.pdf [firstpage_image] =>[orig_patent_app_number] => 12175700 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/175700
MULTIPROCESSOR APPARATUS Jul 17, 2008 Abandoned
Array ( [id] => 4589387 [patent_doc_number] => 07861025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-28 [patent_title] => 'Method and apparatus for automatic detection and healing of signal pair crossover on a high performance serial bus' [patent_app_type] => utility [patent_app_number] => 12/218366 [patent_app_country] => US [patent_app_date] => 2008-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4714 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/861/07861025.pdf [firstpage_image] =>[orig_patent_app_number] => 12218366 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/218366
Method and apparatus for automatic detection and healing of signal pair crossover on a high performance serial bus Jul 13, 2008 Issued
Array ( [id] => 68825 [patent_doc_number] => 07761635 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-07-20 [patent_title] => 'Bridge device access system' [patent_app_type] => utility [patent_app_number] => 12/143677 [patent_app_country] => US [patent_app_date] => 2008-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5249 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/761/07761635.pdf [firstpage_image] =>[orig_patent_app_number] => 12143677 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/143677
Bridge device access system Jun 19, 2008 Issued
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