Search

Robert Edward Fuller

Examiner (ID: 19273, Phone: (571)272-6300 , Office: P/3676 )

Most Active Art Unit
3676
Art Unit(s)
3676, 3672
Total Applications
1121
Issued Applications
829
Pending Applications
108
Abandoned Applications
206

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 400510 [patent_doc_number] => 07296107 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-13 [patent_title] => 'System and method for detection of an accessory device connection status' [patent_app_type] => utility [patent_app_number] => 10/696153 [patent_app_country] => US [patent_app_date] => 2003-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6340 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/296/07296107.pdf [firstpage_image] =>[orig_patent_app_number] => 10696153 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/696153
System and method for detection of an accessory device connection status Oct 27, 2003 Issued
Array ( [id] => 7233955 [patent_doc_number] => 20040073731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Data processing processor' [patent_app_type] => new [patent_app_number] => 10/673851 [patent_app_country] => US [patent_app_date] => 2003-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6361 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20040073731.pdf [firstpage_image] =>[orig_patent_app_number] => 10673851 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/673851
Data processing processor Sep 29, 2003 Issued
Array ( [id] => 7245260 [patent_doc_number] => 20050080971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-04-14 [patent_title] => 'Controller-less board swap' [patent_app_type] => utility [patent_app_number] => 10/671620 [patent_app_country] => US [patent_app_date] => 2003-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3288 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0080/20050080971.pdf [firstpage_image] =>[orig_patent_app_number] => 10671620 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/671620
Controller-less board swap Sep 28, 2003 Abandoned
Array ( [id] => 7268802 [patent_doc_number] => 20040057320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-25 [patent_title] => 'Top/bottom symmetrical protection scheme for flash' [patent_app_type] => new [patent_app_number] => 10/670038 [patent_app_country] => US [patent_app_date] => 2003-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 9341 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0057/20040057320.pdf [firstpage_image] =>[orig_patent_app_number] => 10670038 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/670038
Top/bottom symmetrical protection scheme for flash Sep 23, 2003 Issued
Array ( [id] => 7138361 [patent_doc_number] => 20040044823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Method of detecting a source strobe event using change detection' [patent_app_type] => new [patent_app_number] => 10/654924 [patent_app_country] => US [patent_app_date] => 2003-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10657 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20040044823.pdf [firstpage_image] =>[orig_patent_app_number] => 10654924 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/654924
Method of detecting a source strobe event using change detection Sep 4, 2003 Issued
Array ( [id] => 7361458 [patent_doc_number] => 20040049791 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'System and method for switching signals over twisted-pair wires' [patent_app_type] => new [patent_app_number] => 10/642895 [patent_app_country] => US [patent_app_date] => 2003-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6511 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20040049791.pdf [firstpage_image] =>[orig_patent_app_number] => 10642895 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/642895
System and method for switching signals over twisted-pair wires Aug 17, 2003 Abandoned
Array ( [id] => 7394464 [patent_doc_number] => 20040030952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-12 [patent_title] => 'Rambus based hot plug memory' [patent_app_type] => new [patent_app_number] => 10/636330 [patent_app_country] => US [patent_app_date] => 2003-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3109 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20040030952.pdf [firstpage_image] =>[orig_patent_app_number] => 10636330 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/636330
Rambus based hot plug memory Aug 5, 2003 Abandoned
Array ( [id] => 713148 [patent_doc_number] => 07062587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-13 [patent_title] => 'Unidirectional bus architecture for SoC applications' [patent_app_type] => utility [patent_app_number] => 10/628163 [patent_app_country] => US [patent_app_date] => 2003-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 15326 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 409 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/062/07062587.pdf [firstpage_image] =>[orig_patent_app_number] => 10628163 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/628163
Unidirectional bus architecture for SoC applications Jul 27, 2003 Issued
Array ( [id] => 7473841 [patent_doc_number] => 20040054840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Method and apparatus for inhibiting a selected IDE command' [patent_app_type] => new [patent_app_number] => 10/614570 [patent_app_country] => US [patent_app_date] => 2003-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10921 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20040054840.pdf [firstpage_image] =>[orig_patent_app_number] => 10614570 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/614570
Method and apparatus for inhibiting a selected IDE command Jul 6, 2003 Issued
Array ( [id] => 7605751 [patent_doc_number] => 07099971 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-29 [patent_title] => 'Arbitration system' [patent_app_type] => utility [patent_app_number] => 10/606819 [patent_app_country] => US [patent_app_date] => 2003-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2128 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/099/07099971.pdf [firstpage_image] =>[orig_patent_app_number] => 10606819 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/606819
Arbitration system Jun 25, 2003 Issued
Array ( [id] => 7473855 [patent_doc_number] => 20040054843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Configuration and method having a first device and a second device connected to the first device through a cross bar' [patent_app_type] => new [patent_app_number] => 10/600554 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7950 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20040054843.pdf [firstpage_image] =>[orig_patent_app_number] => 10600554 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/600554
Configuration and method having a first device and a second device connected to the first device through a cross bar Jun 19, 2003 Issued
Array ( [id] => 1049576 [patent_doc_number] => 06865632 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-08 [patent_title] => 'Method and apparatus for arbitration and fairness on a full-duplex bus using dual phases' [patent_app_type] => utility [patent_app_number] => 10/464270 [patent_app_country] => US [patent_app_date] => 2003-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5452 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/865/06865632.pdf [firstpage_image] =>[orig_patent_app_number] => 10464270 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/464270
Method and apparatus for arbitration and fairness on a full-duplex bus using dual phases Jun 16, 2003 Issued
Array ( [id] => 7618485 [patent_doc_number] => 06944705 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-09-13 [patent_title] => 'Method and apparatus for automatic detection and healing of signal pair crossover on a high performance serial bus' [patent_app_type] => utility [patent_app_number] => 10/464169 [patent_app_country] => US [patent_app_date] => 2003-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3933 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/944/06944705.pdf [firstpage_image] =>[orig_patent_app_number] => 10464169 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/464169
Method and apparatus for automatic detection and healing of signal pair crossover on a high performance serial bus Jun 16, 2003 Issued
Array ( [id] => 7343146 [patent_doc_number] => 20040246982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Methods and apparatus for configuring a packet switching (PS) backplane to support various configurations' [patent_app_type] => new [patent_app_number] => 10/455938 [patent_app_country] => US [patent_app_date] => 2003-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7184 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0246/20040246982.pdf [firstpage_image] =>[orig_patent_app_number] => 10455938 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/455938
Methods and apparatus for configuring a packet switching (PS) backplane to support various configurations Jun 5, 2003 Abandoned
Array ( [id] => 6665330 [patent_doc_number] => 20030204657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Method and apparatus for BIOS control of electrical device address/identification assignments' [patent_app_type] => new [patent_app_number] => 10/449530 [patent_app_country] => US [patent_app_date] => 2003-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5872 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20030204657.pdf [firstpage_image] =>[orig_patent_app_number] => 10449530 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/449530
Method and apparatus for BIOS control of electrical device address/identification assignments May 28, 2003 Issued
Array ( [id] => 7678323 [patent_doc_number] => 20030196013 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-16 [patent_title] => 'Method and apparatus for implementing high speed signals using differential reference signals' [patent_app_type] => new [patent_app_number] => 10/446954 [patent_app_country] => US [patent_app_date] => 2003-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3914 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20030196013.pdf [firstpage_image] =>[orig_patent_app_number] => 10446954 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/446954
Method and apparatus for implementing high speed signals using differential reference signals May 26, 2003 Abandoned
Array ( [id] => 7678207 [patent_doc_number] => 20030196129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-16 [patent_title] => 'Selective power-down for high performance' [patent_app_type] => new [patent_app_number] => 10/440312 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6669 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0196/20030196129.pdf [firstpage_image] =>[orig_patent_app_number] => 10440312 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/440312
Selective power-down for high performance CPU/system May 18, 2003 Issued
Array ( [id] => 7459926 [patent_doc_number] => 20040068598 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-08 [patent_title] => 'Multiprocessor system having interrupt controller' [patent_app_type] => new [patent_app_number] => 10/436056 [patent_app_country] => US [patent_app_date] => 2003-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3808 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20040068598.pdf [firstpage_image] =>[orig_patent_app_number] => 10436056 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/436056
Multiprocessor system having interrupt controller May 12, 2003 Abandoned
Array ( [id] => 561967 [patent_doc_number] => 07165135 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-01-16 [patent_title] => 'Method and apparatus for controlling interrupts in a secure execution mode-capable processor' [patent_app_type] => utility [patent_app_number] => 10/419122 [patent_app_country] => US [patent_app_date] => 2003-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6514 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/165/07165135.pdf [firstpage_image] =>[orig_patent_app_number] => 10419122 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/419122
Method and apparatus for controlling interrupts in a secure execution mode-capable processor Apr 17, 2003 Issued
Array ( [id] => 908338 [patent_doc_number] => 07337260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-26 [patent_title] => 'Bus system and information processing system including bus system' [patent_app_type] => utility [patent_app_number] => 10/405258 [patent_app_country] => US [patent_app_date] => 2003-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 39 [patent_no_of_words] => 25381 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 314 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/337/07337260.pdf [firstpage_image] =>[orig_patent_app_number] => 10405258 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/405258
Bus system and information processing system including bus system Mar 31, 2003 Issued
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