Search

Robert Edward Fuller

Examiner (ID: 19273, Phone: (571)272-6300 , Office: P/3676 )

Most Active Art Unit
3676
Art Unit(s)
3676, 3672
Total Applications
1121
Issued Applications
829
Pending Applications
108
Abandoned Applications
206

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1234204 [patent_doc_number] => 06697898 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-02-24 [patent_title] => 'Information processing system for composite appliance' [patent_app_type] => B1 [patent_app_number] => 09/491980 [patent_app_country] => US [patent_app_date] => 2000-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 118 [patent_figures_cnt] => 128 [patent_no_of_words] => 43893 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/697/06697898.pdf [firstpage_image] =>[orig_patent_app_number] => 09491980 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/491980
Information processing system for composite appliance Jan 26, 2000 Issued
Array ( [id] => 4399095 [patent_doc_number] => 06295574 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Real time interrupt handling for superscalar processors' [patent_app_type] => 1 [patent_app_number] => 9/488158 [patent_app_country] => US [patent_app_date] => 2000-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5636 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/295/06295574.pdf [firstpage_image] =>[orig_patent_app_number] => 488158 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/488158
Real time interrupt handling for superscalar processors Jan 19, 2000 Issued
Array ( [id] => 7605661 [patent_doc_number] => 07100061 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-29 [patent_title] => 'Adaptive power control' [patent_app_type] => utility [patent_app_number] => 09/484516 [patent_app_country] => US [patent_app_date] => 2000-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4099 [patent_no_of_claims] => 59 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/100/07100061.pdf [firstpage_image] =>[orig_patent_app_number] => 09484516 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/484516
Adaptive power control Jan 17, 2000 Issued
Array ( [id] => 4380937 [patent_doc_number] => 06256691 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Universal docking station' [patent_app_type] => 1 [patent_app_number] => 9/481266 [patent_app_country] => US [patent_app_date] => 2000-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7089 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256691.pdf [firstpage_image] =>[orig_patent_app_number] => 481266 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/481266
Universal docking station Jan 10, 2000 Issued
Array ( [id] => 1221684 [patent_doc_number] => 06708241 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-03-16 [patent_title] => 'Method and apparatus for processing interrupts' [patent_app_type] => B1 [patent_app_number] => 09/479339 [patent_app_country] => US [patent_app_date] => 2000-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2630 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/708/06708241.pdf [firstpage_image] =>[orig_patent_app_number] => 09479339 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/479339
Method and apparatus for processing interrupts Jan 6, 2000 Issued
Array ( [id] => 1308369 [patent_doc_number] => 06629157 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'System and method for virtualizing the configuration space of PCI devices in a processing system' [patent_app_type] => B1 [patent_app_number] => 09/477322 [patent_app_country] => US [patent_app_date] => 2000-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2849 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/629/06629157.pdf [firstpage_image] =>[orig_patent_app_number] => 09477322 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/477322
System and method for virtualizing the configuration space of PCI devices in a processing system Jan 3, 2000 Issued
Array ( [id] => 1196880 [patent_doc_number] => 06732210 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-05-04 [patent_title] => 'Communication bus for a multi-processor system' [patent_app_type] => B1 [patent_app_number] => 09/476946 [patent_app_country] => US [patent_app_date] => 2000-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4162 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/732/06732210.pdf [firstpage_image] =>[orig_patent_app_number] => 09476946 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/476946
Communication bus for a multi-processor system Jan 2, 2000 Issued
Array ( [id] => 1297958 [patent_doc_number] => 06631431 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-07 [patent_title] => 'Semaphore coding method to ensure data integrity in a can microcontroller and a can microcontroller that implements this method' [patent_app_type] => B1 [patent_app_number] => 09/474903 [patent_app_country] => US [patent_app_date] => 1999-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 8809 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/631/06631431.pdf [firstpage_image] =>[orig_patent_app_number] => 09474903 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474903
Semaphore coding method to ensure data integrity in a can microcontroller and a can microcontroller that implements this method Dec 29, 1999 Issued
Array ( [id] => 1323944 [patent_doc_number] => 06611893 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-26 [patent_title] => 'Data bus method and apparatus providing variable data rates using a smart bus arbiter' [patent_app_type] => B1 [patent_app_number] => 09/474411 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7094 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/611/06611893.pdf [firstpage_image] =>[orig_patent_app_number] => 09474411 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474411
Data bus method and apparatus providing variable data rates using a smart bus arbiter Dec 28, 1999 Issued
Array ( [id] => 1260410 [patent_doc_number] => 06668298 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-23 [patent_title] => 'Shifting an input signal from a high-speed domain to a lower-speed domain' [patent_app_type] => B1 [patent_app_number] => 09/474750 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3123 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/668/06668298.pdf [firstpage_image] =>[orig_patent_app_number] => 09474750 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474750
Shifting an input signal from a high-speed domain to a lower-speed domain Dec 28, 1999 Issued
Array ( [id] => 1381078 [patent_doc_number] => 06574680 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-03 [patent_title] => 'Device and method to enable interrupt handling and control for mass storage devices interfacing to different controllers' [patent_app_type] => B1 [patent_app_number] => 09/474752 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3946 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/574/06574680.pdf [firstpage_image] =>[orig_patent_app_number] => 09474752 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474752
Device and method to enable interrupt handling and control for mass storage devices interfacing to different controllers Dec 28, 1999 Issued
Array ( [id] => 1185981 [patent_doc_number] => 06745342 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Universal serial bus transceiver shortcut protection' [patent_app_type] => B1 [patent_app_number] => 09/474423 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1948 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/745/06745342.pdf [firstpage_image] =>[orig_patent_app_number] => 09474423 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474423
Universal serial bus transceiver shortcut protection Dec 28, 1999 Issued
Array ( [id] => 1326734 [patent_doc_number] => 06609171 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Quad pumped bus architecture and protocol' [patent_app_type] => B1 [patent_app_number] => 09/474058 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11927 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/609/06609171.pdf [firstpage_image] =>[orig_patent_app_number] => 09474058 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474058
Quad pumped bus architecture and protocol Dec 28, 1999 Issued
Array ( [id] => 1326715 [patent_doc_number] => 06609170 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Method and apparatus for BIOS control of electrical device address/identification assignments' [patent_app_type] => B1 [patent_app_number] => 09/474429 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5827 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/609/06609170.pdf [firstpage_image] =>[orig_patent_app_number] => 09474429 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474429
Method and apparatus for BIOS control of electrical device address/identification assignments Dec 28, 1999 Issued
Array ( [id] => 7623872 [patent_doc_number] => 06725305 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-20 [patent_title] => 'Method and apparatus for using a bus as a data storage node' [patent_app_type] => B1 [patent_app_number] => 09/474412 [patent_app_country] => US [patent_app_date] => 1999-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3992 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/725/06725305.pdf [firstpage_image] =>[orig_patent_app_number] => 09474412 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/474412
Method and apparatus for using a bus as a data storage node Dec 28, 1999 Issued
Array ( [id] => 1406899 [patent_doc_number] => 06531896 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-11 [patent_title] => 'Dual mode transmitter' [patent_app_type] => B1 [patent_app_number] => 09/473738 [patent_app_country] => US [patent_app_date] => 1999-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3485 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/531/06531896.pdf [firstpage_image] =>[orig_patent_app_number] => 09473738 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/473738
Dual mode transmitter Dec 27, 1999 Issued
Array ( [id] => 1431847 [patent_doc_number] => 06516369 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-04 [patent_title] => 'Fair and high speed arbitration system based on rotative and weighted priority monitoring' [patent_app_type] => B1 [patent_app_number] => 09/473496 [patent_app_country] => US [patent_app_date] => 1999-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3475 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/516/06516369.pdf [firstpage_image] =>[orig_patent_app_number] => 09473496 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/473496
Fair and high speed arbitration system based on rotative and weighted priority monitoring Dec 27, 1999 Issued
Array ( [id] => 1200899 [patent_doc_number] => 06728812 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-27 [patent_title] => 'Portable information terminal' [patent_app_type] => B1 [patent_app_number] => 09/445829 [patent_app_country] => US [patent_app_date] => 1999-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 7998 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/728/06728812.pdf [firstpage_image] =>[orig_patent_app_number] => 09445829 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/445829
Portable information terminal Dec 13, 1999 Issued
Array ( [id] => 1415516 [patent_doc_number] => 06549972 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-15 [patent_title] => 'Method and system for providing control accesses between a device on a non-proprietary bus and a device on a proprietary bus' [patent_app_type] => B1 [patent_app_number] => 09/444616 [patent_app_country] => US [patent_app_date] => 1999-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/549/06549972.pdf [firstpage_image] =>[orig_patent_app_number] => 09444616 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/444616
Method and system for providing control accesses between a device on a non-proprietary bus and a device on a proprietary bus Nov 21, 1999 Issued
Array ( [id] => 1347651 [patent_doc_number] => 06598110 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-22 [patent_title] => 'Method and apparatus for data conversion in a computer bus' [patent_app_type] => B1 [patent_app_number] => 09/447193 [patent_app_country] => US [patent_app_date] => 1999-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2169 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/598/06598110.pdf [firstpage_image] =>[orig_patent_app_number] => 09447193 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/447193
Method and apparatus for data conversion in a computer bus Nov 21, 1999 Issued
Menu