Robert Edward Fuller

Array ( [id] => 1366187 [patent_doc_number] => 06584525 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-24 [patent_title] => 'Adaptation of standard microprocessor architectures via an interface to a configurable subsystem' [patent_app_type] => B1 [patent_app_number] => 09/443944 [patent_app_country] => US [patent_app_date] => 1999-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5668 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/584/06584525.pdf [firstpage_image] =>[orig_patent_app_number] => 09443944 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1430245 [patent_doc_number] => 06526462 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Programmable multi-tasking memory management system' [patent_app_type] => B1 [patent_app_number] => 09/443934 [patent_app_country] => US [patent_app_date] => 1999-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 9646 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/526/06526462.pdf [firstpage_image] =>[orig_patent_app_number] => 09443934 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4422528 [patent_doc_number] => 06233689 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Communication circuit having network connection detection capability' [patent_app_type] => 1 [patent_app_number] => 9/436931 [patent_app_country] => US [patent_app_date] => 1999-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5605 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/233/06233689.pdf [firstpage_image] =>[orig_patent_app_number] => 436931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7635024 [patent_doc_number] => 06381642 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'In-band method and apparatus for reporting operational statistics relative to the ports of a fibre channel switch' [patent_app_type] => B1 [patent_app_number] => 09/422574 [patent_app_country] => US [patent_app_date] => 1999-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 8350 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/381/06381642.pdf [firstpage_image] =>[orig_patent_app_number] => 09422574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1046271 [patent_doc_number] => 06868455 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-15 [patent_title] => 'Information processing apparatus, information processing method and computer readable medium' [patent_app_type] => utility [patent_app_number] => 09/421005 [patent_app_country] => US [patent_app_date] => 1999-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4259 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/868/06868455.pdf [firstpage_image] =>[orig_patent_app_number] => 09421005 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1431376 [patent_doc_number] => 06519669 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-11 [patent_title] => 'Apparatus and method of connecting a computer and a peripheral device' [patent_app_type] => B1 [patent_app_number] => 09/419375 [patent_app_country] => US [patent_app_date] => 1999-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 10309 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/519/06519669.pdf [firstpage_image] =>[orig_patent_app_number] => 09419375 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1459984 [patent_doc_number] => 06463499 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'Data bus cable having SCSI and IIC bus functionality and process for using the same' [patent_app_type] => B1 [patent_app_number] => 09/418679 [patent_app_country] => US [patent_app_date] => 1999-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3505 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/463/06463499.pdf [firstpage_image] =>[orig_patent_app_number] => 09418679 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1296990 [patent_doc_number] => 06633940 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-14 [patent_title] => 'Method and apparatus for processing interrupts in a computing system' [patent_app_type] => B1 [patent_app_number] => 09/416197 [patent_app_country] => US [patent_app_date] => 1999-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7427 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/633/06633940.pdf [firstpage_image] =>[orig_patent_app_number] => 09416197 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6831533 [patent_doc_number] => 20030182591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'METHOD AND APPARATUS FOR MODE SELECTION IN A COMPUTER SYSTEM' [patent_app_type] => new [patent_app_number] => 09/414974 [patent_app_country] => US [patent_app_date] => 1999-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9954 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20030182591.pdf [firstpage_image] =>[orig_patent_app_number] => 09414974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1366348 [patent_doc_number] => 06584536 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-24 [patent_title] => 'Bus transaction accelerator for multi-clock systems' [patent_app_type] => B1 [patent_app_number] => 09/414693 [patent_app_country] => US [patent_app_date] => 1999-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 27 [patent_no_of_words] => 8063 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/584/06584536.pdf [firstpage_image] =>[orig_patent_app_number] => 09414693 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1423262 [patent_doc_number] => 06539436 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-25 [patent_title] => 'Management of interruptions in a computer platform' [patent_app_type] => B2 [patent_app_number] => 09/402394 [patent_app_country] => US [patent_app_date] => 1999-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 4377 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/539/06539436.pdf [firstpage_image] =>[orig_patent_app_number] => 09402394 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1552765 [patent_doc_number] => 06446151 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Programmable time slot interface bus arbiter' [patent_app_type] => B1 [patent_app_number] => 09/407856 [patent_app_country] => US [patent_app_date] => 1999-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/446/06446151.pdf [firstpage_image] =>[orig_patent_app_number] => 09407856 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1284372 [patent_doc_number] => 06651125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-11-18 [patent_title] => 'Processing channel subsystem pending I/O work queues based on priorities' [patent_app_type] => B2 [patent_app_number] => 09/407459 [patent_app_country] => US [patent_app_date] => 1999-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 39 [patent_no_of_words] => 14993 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/651/06651125.pdf [firstpage_image] =>[orig_patent_app_number] => 09407459 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1425102 [patent_doc_number] => 06535945 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Method and apparatus for programmable adjustment of computer system bus parameters' [patent_app_type] => B1 [patent_app_number] => 09/387120 [patent_app_country] => US [patent_app_date] => 1999-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 13762 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535945.pdf [firstpage_image] =>[orig_patent_app_number] => 09387120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1291737 [patent_doc_number] => 06643726 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-11-04 [patent_title] => 'Method of manufacture and apparatus of an integrated computing system' [patent_app_type] => B1 [patent_app_number] => 09/376820 [patent_app_country] => US [patent_app_date] => 1999-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3093 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/643/06643726.pdf [firstpage_image] =>[orig_patent_app_number] => 09376820 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1444039 [patent_doc_number] => 06496889 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Chip-to-chip communication system using an ac-coupled bus and devices employed in same' [patent_app_type] => B1 [patent_app_number] => 09/398251 [patent_app_country] => US [patent_app_date] => 1999-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 30 [patent_no_of_words] => 9120 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 37 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496889.pdf [firstpage_image] =>[orig_patent_app_number] => 09398251 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1423802 [patent_doc_number] => 06539485 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-25 [patent_title] => 'Intelligent sleep mode indicator' [patent_app_type] => B1 [patent_app_number] => 09/347729 [patent_app_country] => US [patent_app_date] => 1999-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4585 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/539/06539485.pdf [firstpage_image] =>[orig_patent_app_number] => 09347729 [rel_patent_id] =>[rel_patent_doc_number] =>)