
Robert Edward Fuller
Examiner (ID: 19273, Phone: (571)272-6300 , Office: P/3676 )
| Most Active Art Unit | 3676 |
| Art Unit(s) | 3676, 3672 |
| Total Applications | 1121 |
| Issued Applications | 829 |
| Pending Applications | 108 |
| Abandoned Applications | 206 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4088577
[patent_doc_number] => 06070219
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-30
[patent_title] => 'Hierarchical interrupt structure for event notification on multi-virtual circuit network interface controller'
[patent_app_type] => 1
[patent_app_number] => 8/728514
[patent_app_country] => US
[patent_app_date] => 1996-10-09
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Array
(
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[patent_issue_date] => 1999-01-05
[patent_title] => 'Hierarchical bus structure access system'
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[patent_app_date] => 1996-10-02
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Array
(
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[patent_title] => 'Instruction pointer limits in processor that performs speculative out-of-order instruction execution'
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Array
(
[id] => 3968871
[patent_doc_number] => 05956715
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-21
[patent_title] => 'Method and system for controlling user access to a resource in a networked computing environment'
[patent_app_type] => 1
[patent_app_number] => 8/710975
[patent_app_country] => US
[patent_app_date] => 1996-09-23
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[patent_drawing_sheets_cnt] => 12
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Array
(
[id] => 4236656
[patent_doc_number] => 06088620
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[patent_kind] => NA
[patent_issue_date] => 2000-07-11
[patent_title] => 'Computer system in which a high-order application program recognizes a power-on factor or a state of an expansion unit'
[patent_app_type] => 1
[patent_app_number] => 8/716865
[patent_app_country] => US
[patent_app_date] => 1996-09-20
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Array
(
[id] => 3970957
[patent_doc_number] => 06000003
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[patent_issue_date] => 1999-12-07
[patent_title] => 'Communication circuit having network connection detection capability'
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[patent_app_number] => 8/715927
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 715927
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/715927 | Communication circuit having network connection detection capability | Sep 18, 1996 | Issued |
Array
(
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[patent_kind] => NA
[patent_issue_date] => 1998-08-25
[patent_title] => 'Method and apparatus for concurrent data routing'
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[patent_app_number] => 8/709904
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/709904 | Method and apparatus for concurrent data routing | Sep 8, 1996 | Issued |
Array
(
[id] => 4031781
[patent_doc_number] => 05881298
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-09
[patent_title] => 'Portable computer with selectively operable cooling unit'
[patent_app_type] => 1
[patent_app_number] => 8/707634
[patent_app_country] => US
[patent_app_date] => 1996-09-05
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[pdf_file] => patents/05/881/05881298.pdf
[firstpage_image] =>[orig_patent_app_number] => 707634
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/707634 | Portable computer with selectively operable cooling unit | Sep 4, 1996 | Issued |
Array
(
[id] => 3818189
[patent_doc_number] => 05854905
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-29
[patent_title] => 'Extensible bios for boot support of devices on multiple hierarchical buses'
[patent_app_type] => 1
[patent_app_number] => 8/707333
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[patent_app_date] => 1996-09-03
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/707333 | Extensible bios for boot support of devices on multiple hierarchical buses | Sep 2, 1996 | Issued |
Array
(
[id] => 3858103
[patent_doc_number] => 05745698
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-28
[patent_title] => 'System and method for communicating between devices'
[patent_app_type] => 1
[patent_app_number] => 8/704035
[patent_app_country] => US
[patent_app_date] => 1996-08-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/704035 | System and method for communicating between devices | Aug 27, 1996 | Issued |
Array
(
[id] => 3735798
[patent_doc_number] => 05701425
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[patent_kind] => NA
[patent_issue_date] => 1997-12-23
[patent_title] => 'Data processor with functional register and data processing method'
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[pdf_file] => patents/05/701/05701425.pdf
[firstpage_image] =>[orig_patent_app_number] => 704362
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/704362 | Data processor with functional register and data processing method | Aug 27, 1996 | Issued |
Array
(
[id] => 3829122
[patent_doc_number] => 05771390
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[patent_title] => 'System and method for cascading from a power managed suspend state to a suspend-to-disk state in a computer system'
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Array
(
[id] => 3782628
[patent_doc_number] => 05850529
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[patent_issue_date] => 1998-12-15
[patent_title] => 'Method and apparatus for detecting a resource lock on a PCI bus'
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Array
(
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Array
(
[id] => 3848878
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Array
(
[id] => 4132595
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Array
(
[id] => 3762586
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Array
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/646484 | Method and apparatus for providing single channel communications | May 7, 1996 | Issued |