Search

Robert Edward Fuller

Examiner (ID: 19273, Phone: (571)272-6300 , Office: P/3676 )

Most Active Art Unit
3676
Art Unit(s)
3676, 3672
Total Applications
1121
Issued Applications
829
Pending Applications
108
Abandoned Applications
206

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4088577 [patent_doc_number] => 06070219 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Hierarchical interrupt structure for event notification on multi-virtual circuit network interface controller' [patent_app_type] => 1 [patent_app_number] => 8/728514 [patent_app_country] => US [patent_app_date] => 1996-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4737 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/070/06070219.pdf [firstpage_image] =>[orig_patent_app_number] => 728514 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/728514
Hierarchical interrupt structure for event notification on multi-virtual circuit network interface controller Oct 8, 1996 Issued
Array ( [id] => 4047760 [patent_doc_number] => 05857084 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'Hierarchical bus structure access system' [patent_app_type] => 1 [patent_app_number] => 8/725019 [patent_app_country] => US [patent_app_date] => 1996-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 4139 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/857/05857084.pdf [firstpage_image] =>[orig_patent_app_number] => 725019 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/725019
Hierarchical bus structure access system Oct 1, 1996 Issued
Array ( [id] => 3848017 [patent_doc_number] => 05740393 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Instruction pointer limits in processor that performs speculative out-of-order instruction execution' [patent_app_type] => 1 [patent_app_number] => 8/723286 [patent_app_country] => US [patent_app_date] => 1996-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10415 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740393.pdf [firstpage_image] =>[orig_patent_app_number] => 723286 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/723286
Instruction pointer limits in processor that performs speculative out-of-order instruction execution Sep 29, 1996 Issued
Array ( [id] => 3968871 [patent_doc_number] => 05956715 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Method and system for controlling user access to a resource in a networked computing environment' [patent_app_type] => 1 [patent_app_number] => 8/710975 [patent_app_country] => US [patent_app_date] => 1996-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6155 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956715.pdf [firstpage_image] =>[orig_patent_app_number] => 710975 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/710975
Method and system for controlling user access to a resource in a networked computing environment Sep 22, 1996 Issued
Array ( [id] => 4236656 [patent_doc_number] => 06088620 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-11 [patent_title] => 'Computer system in which a high-order application program recognizes a power-on factor or a state of an expansion unit' [patent_app_type] => 1 [patent_app_number] => 8/716865 [patent_app_country] => US [patent_app_date] => 1996-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 7942 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/088/06088620.pdf [firstpage_image] =>[orig_patent_app_number] => 716865 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/716865
Computer system in which a high-order application program recognizes a power-on factor or a state of an expansion unit Sep 19, 1996 Issued
Array ( [id] => 3970957 [patent_doc_number] => 06000003 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Communication circuit having network connection detection capability' [patent_app_type] => 1 [patent_app_number] => 8/715927 [patent_app_country] => US [patent_app_date] => 1996-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5603 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/000/06000003.pdf [firstpage_image] =>[orig_patent_app_number] => 715927 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/715927
Communication circuit having network connection detection capability Sep 18, 1996 Issued
Array ( [id] => 3894600 [patent_doc_number] => 05799161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Method and apparatus for concurrent data routing' [patent_app_type] => 1 [patent_app_number] => 8/709904 [patent_app_country] => US [patent_app_date] => 1996-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3672 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/799/05799161.pdf [firstpage_image] =>[orig_patent_app_number] => 709904 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/709904
Method and apparatus for concurrent data routing Sep 8, 1996 Issued
Array ( [id] => 4031781 [patent_doc_number] => 05881298 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Portable computer with selectively operable cooling unit' [patent_app_type] => 1 [patent_app_number] => 8/707634 [patent_app_country] => US [patent_app_date] => 1996-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4436 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881298.pdf [firstpage_image] =>[orig_patent_app_number] => 707634 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/707634
Portable computer with selectively operable cooling unit Sep 4, 1996 Issued
Array ( [id] => 3818189 [patent_doc_number] => 05854905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Extensible bios for boot support of devices on multiple hierarchical buses' [patent_app_type] => 1 [patent_app_number] => 8/707333 [patent_app_country] => US [patent_app_date] => 1996-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 8775 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854905.pdf [firstpage_image] =>[orig_patent_app_number] => 707333 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/707333
Extensible bios for boot support of devices on multiple hierarchical buses Sep 2, 1996 Issued
Array ( [id] => 3858103 [patent_doc_number] => 05745698 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'System and method for communicating between devices' [patent_app_type] => 1 [patent_app_number] => 8/704035 [patent_app_country] => US [patent_app_date] => 1996-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6141 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745698.pdf [firstpage_image] =>[orig_patent_app_number] => 704035 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/704035
System and method for communicating between devices Aug 27, 1996 Issued
Array ( [id] => 3735798 [patent_doc_number] => 05701425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Data processor with functional register and data processing method' [patent_app_type] => 1 [patent_app_number] => 8/704362 [patent_app_country] => US [patent_app_date] => 1996-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8021 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/701/05701425.pdf [firstpage_image] =>[orig_patent_app_number] => 704362 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/704362
Data processor with functional register and data processing method Aug 27, 1996 Issued
Array ( [id] => 3829122 [patent_doc_number] => 05771390 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-23 [patent_title] => 'System and method for cascading from a power managed suspend state to a suspend-to-disk state in a computer system' [patent_app_type] => 1 [patent_app_number] => 8/697432 [patent_app_country] => US [patent_app_date] => 1996-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3729 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/771/05771390.pdf [firstpage_image] =>[orig_patent_app_number] => 697432 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/697432
System and method for cascading from a power managed suspend state to a suspend-to-disk state in a computer system Aug 22, 1996 Issued
Array ( [id] => 3782628 [patent_doc_number] => 05850529 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-15 [patent_title] => 'Method and apparatus for detecting a resource lock on a PCI bus' [patent_app_type] => 1 [patent_app_number] => 8/702430 [patent_app_country] => US [patent_app_date] => 1996-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7338 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/850/05850529.pdf [firstpage_image] =>[orig_patent_app_number] => 702430 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/702430
Method and apparatus for detecting a resource lock on a PCI bus Aug 8, 1996 Issued
Array ( [id] => 3878584 [patent_doc_number] => 05797020 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-18 [patent_title] => 'Bus master arbitration circuitry having improved prioritization' [patent_app_type] => 1 [patent_app_number] => 8/692207 [patent_app_country] => US [patent_app_date] => 1996-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 10907 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/797/05797020.pdf [firstpage_image] =>[orig_patent_app_number] => 692207 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/692207
Bus master arbitration circuitry having improved prioritization Aug 4, 1996 Issued
Array ( [id] => 3848878 [patent_doc_number] => 05740450 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Method to automatically detect the interrupt channel status of an add-on card' [patent_app_type] => 1 [patent_app_number] => 8/690333 [patent_app_country] => US [patent_app_date] => 1996-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3396 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740450.pdf [firstpage_image] =>[orig_patent_app_number] => 690333 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/690333
Method to automatically detect the interrupt channel status of an add-on card Jul 25, 1996 Issued
Array ( [id] => 4132595 [patent_doc_number] => 06047319 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-04 [patent_title] => 'Network terminal server with full API implementation' [patent_app_type] => 1 [patent_app_number] => 8/682407 [patent_app_country] => US [patent_app_date] => 1996-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 13569 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/047/06047319.pdf [firstpage_image] =>[orig_patent_app_number] => 682407 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/682407
Network terminal server with full API implementation Jul 16, 1996 Issued
Array ( [id] => 3762586 [patent_doc_number] => 05802378 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Performance monitoring in multiprocessor system with interrupt masking' [patent_app_type] => 1 [patent_app_number] => 8/675427 [patent_app_country] => US [patent_app_date] => 1996-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4942 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802378.pdf [firstpage_image] =>[orig_patent_app_number] => 675427 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/675427
Performance monitoring in multiprocessor system with interrupt masking Jun 25, 1996 Issued
Array ( [id] => 4063628 [patent_doc_number] => 05964858 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-12 [patent_title] => 'Digital communication unit monitoring' [patent_app_type] => 1 [patent_app_number] => 8/596113 [patent_app_country] => US [patent_app_date] => 1996-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3614 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/964/05964858.pdf [firstpage_image] =>[orig_patent_app_number] => 596113 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/596113
Digital communication unit monitoring Jun 16, 1996 Issued
Array ( [id] => 3984397 [patent_doc_number] => 05887179 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-23 [patent_title] => 'System power saving means and method' [patent_app_type] => 1 [patent_app_number] => 8/807129 [patent_app_country] => US [patent_app_date] => 1996-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4781 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/887/05887179.pdf [firstpage_image] =>[orig_patent_app_number] => 807129 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/807129
System power saving means and method Jun 10, 1996 Issued
Array ( [id] => 3992688 [patent_doc_number] => 05918024 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Method and apparatus for providing single channel communications' [patent_app_type] => 1 [patent_app_number] => 8/646484 [patent_app_country] => US [patent_app_date] => 1996-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3101 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/918/05918024.pdf [firstpage_image] =>[orig_patent_app_number] => 646484 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/646484
Method and apparatus for providing single channel communications May 7, 1996 Issued
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