Robert Edward Fuller

Array ( [id] => 3799594 [patent_doc_number] => 05737338 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'ATM exchange and method of testing same' [patent_app_type] => 1 [patent_app_number] => 8/510181 [patent_app_country] => US [patent_app_date] => 1995-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 14559 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/737/05737338.pdf [firstpage_image] =>[orig_patent_app_number] => 510181 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4030992 [patent_doc_number] => 05881249 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'I/O bus' [patent_app_type] => 1 [patent_app_number] => 8/509626 [patent_app_country] => US [patent_app_date] => 1995-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4737 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881249.pdf [firstpage_image] =>[orig_patent_app_number] => 509626 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3694222 [patent_doc_number] => 05634014 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Semiconductor process, power supply voltage and temperature compensated integrated system bus termination' [patent_app_type] => 1 [patent_app_number] => 8/501388 [patent_app_country] => US [patent_app_date] => 1995-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 17744 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/634/05634014.pdf [firstpage_image] =>[orig_patent_app_number] => 501388 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3797176 [patent_doc_number] => 05758171 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Apparatus and method for reading back socket power status information' [patent_app_type] => 1 [patent_app_number] => 8/498330 [patent_app_country] => US [patent_app_date] => 1995-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3656 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/758/05758171.pdf [firstpage_image] =>[orig_patent_app_number] => 498330 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3641937 [patent_doc_number] => 05687330 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Semiconductor process, power supply and temperature compensated system bus integrated interface architecture with precision receiver' [patent_app_type] => 1 [patent_app_number] => 8/490437 [patent_app_country] => US [patent_app_date] => 1995-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 27 [patent_no_of_words] => 19137 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687330.pdf [firstpage_image] =>[orig_patent_app_number] => 490437 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3547591 [patent_doc_number] => 05557759 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-17 [patent_title] => 'Video processor with non-stalling interrupt service' [patent_app_type] => 1 [patent_app_number] => 8/475667 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11130 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 428 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/557/05557759.pdf [firstpage_image] =>[orig_patent_app_number] => 475667 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3847306 [patent_doc_number] => 05740349 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Method and apparatus for reliably storing defect information in flash disk memories' [patent_app_type] => 1 [patent_app_number] => 8/481927 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9757 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740349.pdf [firstpage_image] =>[orig_patent_app_number] => 481927 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3737076 [patent_doc_number] => 05701507 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Architecture of a chip having multiple processors and multiple memories' [patent_app_type] => 1 [patent_app_number] => 8/475272 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3023 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/701/05701507.pdf [firstpage_image] =>[orig_patent_app_number] => 475272 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3877973 [patent_doc_number] => 05793964 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Web browser system' [patent_app_type] => 1 [patent_app_number] => 8/479481 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 11517 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/793/05793964.pdf [firstpage_image] =>[orig_patent_app_number] => 479481 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3616351 [patent_doc_number] => 05579490 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-26 [patent_title] => 'Expanded address bus system' [patent_app_type] => 1 [patent_app_number] => 8/462665 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 20 [patent_no_of_words] => 3353 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/579/05579490.pdf [firstpage_image] =>[orig_patent_app_number] => 462665 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3775303 [patent_doc_number] => 05742745 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Communication device' [patent_app_type] => 1 [patent_app_number] => 8/447652 [patent_app_country] => US [patent_app_date] => 1995-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 49 [patent_no_of_words] => 21709 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742745.pdf [firstpage_image] =>[orig_patent_app_number] => 447652 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4203852 [patent_doc_number] => 06151650 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-21 [patent_title] => 'Central processing unit of a modular programmable controller' [patent_app_type] => 1 [patent_app_number] => 8/419166 [patent_app_country] => US [patent_app_date] => 1995-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1909 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/151/06151650.pdf [firstpage_image] =>[orig_patent_app_number] => 419166 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3871928 [patent_doc_number] => 05768531 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Apparatus and method for using multiple communication paths in a wireless LAN' [patent_app_type] => 1 [patent_app_number] => 8/411205 [patent_app_country] => US [patent_app_date] => 1995-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5784 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768531.pdf [firstpage_image] =>[orig_patent_app_number] => 411205 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4121417 [patent_doc_number] => 06023751 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Computer system and method for evaluating predicates and Boolean expressions' [patent_app_type] => 1 [patent_app_number] => 8/400414 [patent_app_country] => US [patent_app_date] => 1995-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5239 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023751.pdf [firstpage_image] =>[orig_patent_app_number] => 400414 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3904693 [patent_doc_number] => 05778196 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Method and device for identifying a bus memory region' [patent_app_type] => 1 [patent_app_number] => 8/394337 [patent_app_country] => US [patent_app_date] => 1995-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4135 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778196.pdf [firstpage_image] =>[orig_patent_app_number] => 394337 [rel_patent_id] =>[rel_patent_doc_number] =>)