
Robert Franklin Long
Examiner (ID: 5941)
| Most Active Art Unit | 3731 |
| Art Unit(s) | 4148, 3731, 3764, 3721 |
| Total Applications | 1367 |
| Issued Applications | 933 |
| Pending Applications | 129 |
| Abandoned Applications | 334 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6186337
[patent_doc_number] => 20110170359
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-14
[patent_title] => 'WORD LINE VOLTAGE BOOST SYSTEM AND METHOD FOR NON-VOLATILE MEMORY DEVICES AND MEMORY DEVICES AND PROCESSOR-BASED SYSTEM USING SAME'
[patent_app_type] => utility
[patent_app_number] => 13/070121
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[patent_app_date] => 2011-03-23
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0170/20110170359.pdf
[firstpage_image] =>[orig_patent_app_number] => 13070121
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/070121 | Word line voltage boost system and method for non-volatile memory devices and memory devices and processor-based system using same | Mar 22, 2011 | Issued |
Array
(
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[patent_doc_number] => 08462537
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[patent_kind] => B2
[patent_issue_date] => 2013-06-11
[patent_title] => 'Method and apparatus to reset a phase change memory and switch (PCMS) memory cell'
[patent_app_type] => utility
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Array
(
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[patent_issue_date] => 2011-09-29
[patent_title] => 'Single-Polycrystalline Silicon Electrically Erasable and Programmable Memory Device of Varied Gate Oxide Thickness, Using PIP or MIM Coupling Capacitor for Cell Size Reduction and Simultaneous VPP and VNN for Write Voltage Reduction'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/052049 | Single-polycrystalline silicon electrically erasable and programmable memory device of varied gate oxide thickness, using PIP or MIM coupling capacitor for cell size reduction and simultaneous VPP and VNN for write voltage reduction | Mar 18, 2011 | Issued |
Array
(
[id] => 8245955
[patent_doc_number] => 08203889
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[patent_kind] => B2
[patent_issue_date] => 2012-06-19
[patent_title] => 'High-speed verifiable semiconductor memory device'
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Array
(
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[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME'
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Array
(
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[patent_title] => 'Techniques for providing a semiconductor memory device'
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Array
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[patent_title] => 'ELECTRIC DEVICE'
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[firstpage_image] =>[orig_patent_app_number] => 13042265
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/042265 | ELECTRIC DEVICE | Mar 6, 2011 | Abandoned |
Array
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[id] => 8593400
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[patent_title] => 'Method for operating semiconductor memory device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/039557 | Method for operating semiconductor memory device | Mar 2, 2011 | Issued |
Array
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[id] => 8068231
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/034937 | Command decoder and a semiconductor memory device including the same | Feb 24, 2011 | Issued |
Array
(
[id] => 6078180
[patent_doc_number] => 20110141819
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[patent_issue_date] => 2011-06-16
[patent_title] => 'SEGMENTED BITSCAN FOR VERIFICATION OF PROGRAMMING'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/035539 | Segmented bitscan for verification of programming | Feb 24, 2011 | Issued |
Array
(
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Array
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Array
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Array
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