Robert G. Nilson

Array ( [id] => 19573834 [patent_doc_number] => 20240378126 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => TRACING CIRCUIT, SEMICONDUCTOR DEVICE, TRACER, AND TRACING SYSTEM [patent_app_type] => utility [patent_app_number] => 18/782146 [patent_app_country] => US [patent_app_date] => 2024-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6930 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18782146 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20487444 [patent_doc_number] => 20260023643 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => PREDICTIVE SELF-HEALING SYSTEM FOR COMPUTER ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 18/779789 [patent_app_country] => US [patent_app_date] => 2024-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779789 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20487433 [patent_doc_number] => 20260023632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => VOLATILE MEMORY SCHEMA FOR SAFE STATE CONFIGURATION [patent_app_type] => utility [patent_app_number] => 18/777058 [patent_app_country] => US [patent_app_date] => 2024-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18777058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20446989 [patent_doc_number] => 20260003711 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-01 [patent_title] => COMMAND REQUESTS FOR HARDWARE ACCELERATORS [patent_app_type] => utility [patent_app_number] => 18/758183 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 46261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18758183 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19695008 [patent_doc_number] => 20250013553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => METHOD TO DETECTING INFINITE LOOPS IN REAL-TIME LOGS FROM A CONTINUOUS INTEGRATION ENVIRONMENT [patent_app_type] => utility [patent_app_number] => 18/740656 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740656 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20408855 [patent_doc_number] => 20250377964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-11 [patent_title] => KERNEL DUMP DISTRIBUTION ACROSS ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 18/739434 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739434 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19419857 [patent_doc_number] => 20240295980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => MEMORY SYSTEM WITH ACCESSIBLE STORAGE REGION TO GATEWAY [patent_app_type] => utility [patent_app_number] => 18/662038 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9406 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20609921 [patent_doc_number] => 12585523 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Bus anomaly detecting methods, processing methods, apparatuses, system, device, and medium [patent_app_type] => utility [patent_app_number] => 18/660919 [patent_app_country] => US [patent_app_date] => 2024-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 6066 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18660919 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19391444 [patent_doc_number] => 20240281314 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => REAL TIME DETECTION OF METRIC BASELINE BEHAVIOR CHANGE [patent_app_type] => utility [patent_app_number] => 18/652530 [patent_app_country] => US [patent_app_date] => 2024-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20323195 [patent_doc_number] => 20250335283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => WORKLOAD CONTEXT AWARE DYNAMIC MEMORY TUNING [patent_app_type] => utility [patent_app_number] => 18/650835 [patent_app_country] => US [patent_app_date] => 2024-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18650835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20323194 [patent_doc_number] => 20250335282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => CENTRALIZED LOG VISUALIZATION FOR ANALYSIS DEBUGGING IN CLUSTER NETWORKS [patent_app_type] => utility [patent_app_number] => 18/646647 [patent_app_country] => US [patent_app_date] => 2024-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8373 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646647 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19545071 [patent_doc_number] => 20240362107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => METHOD AND SYSTEM FOR PROCESSING ERROR LOGS [patent_app_type] => utility [patent_app_number] => 18/643402 [patent_app_country] => US [patent_app_date] => 2024-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11683 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18643402 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19514246 [patent_doc_number] => 20240345932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => MEMORY DEVICE HEALTH MONITORING LOGIC [patent_app_type] => utility [patent_app_number] => 18/630614 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12024 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630614 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20290090 [patent_doc_number] => 20250315333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => FAST CORE DUMP GENERATION FOR MEMORY INTENSIVE APPLICATIONS IN PUBLIC CLOUDS [patent_app_type] => utility [patent_app_number] => 18/630278 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630278 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20290089 [patent_doc_number] => 20250315332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => CRASH HANDLING IN A HETEROGENEOUS COMPUTING PLATFORM [patent_app_type] => utility [patent_app_number] => 18/625300 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5836 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625300 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20234351 [patent_doc_number] => 20250291670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => SYSTEM AND METHOD FOR DYNAMIC INCIDENT RESOLUTION IN COMPUTING ENVIRONMENTS [patent_app_type] => utility [patent_app_number] => 18/605228 [patent_app_country] => US [patent_app_date] => 2024-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3561 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18605228 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20580180 [patent_doc_number] => 12572431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-10 [patent_title] => Method, device, and product for selecting input output array [patent_app_type] => utility [patent_app_number] => 18/601022 [patent_app_country] => US [patent_app_date] => 2024-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3103 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 361 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18601022 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19848923 [patent_doc_number] => 20250094274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => EXCEPTION RESET MONITORING METHOD FOR MULTI-CORE MICRO CONTROL UNIT [patent_app_type] => utility [patent_app_number] => 18/594953 [patent_app_country] => US [patent_app_date] => 2024-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18594953 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19451089 [patent_doc_number] => 20240311219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => DYNAMIC RANDOM ACCESS MEMORY (DRAM) DEVICE WITH WRITE ERROR PROTECTION [patent_app_type] => utility [patent_app_number] => 18/591545 [patent_app_country] => US [patent_app_date] => 2024-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10352 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18591545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20609920 [patent_doc_number] => 12585522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-24 [patent_title] => Systems and methods for coherent data transfer with sync in a multiple core processor [patent_app_type] => utility [patent_app_number] => 18/582166 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18582166 [rel_patent_id] =>[rel_patent_doc_number] =>)