Search

Robert L Deberadinis

Examiner (ID: 12586, Phone: (571)272-2049 , Office: P/2836 )

Most Active Art Unit
2836
Art Unit(s)
2836
Total Applications
2918
Issued Applications
2501
Pending Applications
144
Abandoned Applications
273

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5124585 [patent_doc_number] => 20070236856 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-11 [patent_title] => 'Ion Generator and Method for Controlling Amount of Ozone Generated in the Same' [patent_app_type] => utility [patent_app_number] => 11/765059 [patent_app_country] => US [patent_app_date] => 2007-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3329 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20070236856.pdf [firstpage_image] =>[orig_patent_app_number] => 11765059 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/765059
Ion generator and method for controlling amount of ozone generated in the same Jun 18, 2007 Issued
Array ( [id] => 114045 [patent_doc_number] => 07719810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'Overvoltage protection circuit and electronic device' [patent_app_type] => utility [patent_app_number] => 11/808361 [patent_app_country] => US [patent_app_date] => 2007-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4401 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/719/07719810.pdf [firstpage_image] =>[orig_patent_app_number] => 11808361 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/808361
Overvoltage protection circuit and electronic device Jun 7, 2007 Issued
Array ( [id] => 44849 [patent_doc_number] => 07782584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'Load drive controller and control system' [patent_app_type] => utility [patent_app_number] => 11/806865 [patent_app_country] => US [patent_app_date] => 2007-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 8219 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/782/07782584.pdf [firstpage_image] =>[orig_patent_app_number] => 11806865 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/806865
Load drive controller and control system Jun 4, 2007 Issued
Array ( [id] => 5163084 [patent_doc_number] => 20070284665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-13 [patent_title] => 'Electrostatic discharge protection device' [patent_app_type] => utility [patent_app_number] => 11/806962 [patent_app_country] => US [patent_app_date] => 2007-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 7158 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20070284665.pdf [firstpage_image] =>[orig_patent_app_number] => 11806962 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/806962
Electrostatic discharge protection device Jun 4, 2007 Issued
Array ( [id] => 4796298 [patent_doc_number] => 20080007884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-10 [patent_title] => 'Protection circuit for an input stage, and respective circuit arrangement' [patent_app_type] => utility [patent_app_number] => 11/810160 [patent_app_country] => US [patent_app_date] => 2007-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1774 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0007/20080007884.pdf [firstpage_image] =>[orig_patent_app_number] => 11810160 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/810160
Protection circuit for an input stage, and respective circuit arrangement Jun 4, 2007 Abandoned
Array ( [id] => 4521656 [patent_doc_number] => 07911746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-22 [patent_title] => 'GFCI with self-test and remote annunciation capabilities' [patent_app_type] => utility [patent_app_number] => 11/756362 [patent_app_country] => US [patent_app_date] => 2007-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 14330 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/911/07911746.pdf [firstpage_image] =>[orig_patent_app_number] => 11756362 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/756362
GFCI with self-test and remote annunciation capabilities May 30, 2007 Issued
Array ( [id] => 7592341 [patent_doc_number] => 07652864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-01-26 [patent_title] => 'Thermal protection of a switch' [patent_app_type] => utility [patent_app_number] => 11/807510 [patent_app_country] => US [patent_app_date] => 2007-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 17 [patent_no_of_words] => 3756 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/652/07652864.pdf [firstpage_image] =>[orig_patent_app_number] => 11807510 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/807510
Thermal protection of a switch May 28, 2007 Issued
Array ( [id] => 5061520 [patent_doc_number] => 20070223159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Semiconductor Module with Serial Bus Connection to Multiple Dies' [patent_app_type] => utility [patent_app_number] => 11/754199 [patent_app_country] => US [patent_app_date] => 2007-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4419 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0223/20070223159.pdf [firstpage_image] =>[orig_patent_app_number] => 11754199 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754199
Semiconductor Module with Serial Bus Connection to Multiple Dies May 24, 2007 Abandoned
Array ( [id] => 5060424 [patent_doc_number] => 20070222061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Semiconductor Module With Serial Bus Connection to Multiple Dies' [patent_app_type] => utility [patent_app_number] => 11/754206 [patent_app_country] => US [patent_app_date] => 2007-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4419 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20070222061.pdf [firstpage_image] =>[orig_patent_app_number] => 11754206 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754206
Semiconductor Module With Serial Bus Connection to Multiple Dies May 24, 2007 Abandoned
Array ( [id] => 5090495 [patent_doc_number] => 20070230134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Semiconductor Module with Serial Bus Connection to Multiple Dies' [patent_app_type] => utility [patent_app_number] => 11/754212 [patent_app_country] => US [patent_app_date] => 2007-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4419 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20070230134.pdf [firstpage_image] =>[orig_patent_app_number] => 11754212 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754212
Semiconductor Module with Serial Bus Connection to Multiple Dies May 24, 2007 Abandoned
Array ( [id] => 5090500 [patent_doc_number] => 20070230139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Semiconductor Module with Serial Bus Connection to Multiple Dies' [patent_app_type] => utility [patent_app_number] => 11/754211 [patent_app_country] => US [patent_app_date] => 2007-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 4419 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20070230139.pdf [firstpage_image] =>[orig_patent_app_number] => 11754211 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/754211
Semiconductor Module with Serial Bus Connection to Multiple Dies May 24, 2007 Abandoned
Array ( [id] => 4777189 [patent_doc_number] => 20080285187 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'CDM ESD PROTECTION FOR INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 11/750062 [patent_app_country] => US [patent_app_date] => 2007-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3234 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20080285187.pdf [firstpage_image] =>[orig_patent_app_number] => 11750062 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/750062
CDM ESD PROTECTION FOR INTEGRATED CIRCUITS May 16, 2007 Abandoned
Array ( [id] => 4777204 [patent_doc_number] => 20080285202 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-20 [patent_title] => 'IN SITU MONITORING OF WAFER CHARGE DISTRIBUTION IN PLASMA PROCESSING' [patent_app_type] => utility [patent_app_number] => 11/748560 [patent_app_country] => US [patent_app_date] => 2007-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7166 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20080285202.pdf [firstpage_image] =>[orig_patent_app_number] => 11748560 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/748560
In situ monitoring of wafer charge distribution in plasma processing May 14, 2007 Issued
Array ( [id] => 46422 [patent_doc_number] => 07778002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-17 [patent_title] => 'Method and apparatus to reduce ring out in an ignition coil to allow for ion sense processing' [patent_app_type] => utility [patent_app_number] => 11/747662 [patent_app_country] => US [patent_app_date] => 2007-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 6069 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/778/07778002.pdf [firstpage_image] =>[orig_patent_app_number] => 11747662 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/747662
Method and apparatus to reduce ring out in an ignition coil to allow for ion sense processing May 10, 2007 Issued
Array ( [id] => 5027192 [patent_doc_number] => 20070268638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-22 [patent_title] => 'Circuit arrangement for protection against electrostatic discharges and method for diverting electrostatic discharges' [patent_app_type] => utility [patent_app_number] => 11/801559 [patent_app_country] => US [patent_app_date] => 2007-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5322 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0268/20070268638.pdf [firstpage_image] =>[orig_patent_app_number] => 11801559 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/801559
Circuit arrangement for protection against electrostatic discharges and method for diverting electrostatic discharges May 9, 2007 Issued
Array ( [id] => 5002977 [patent_doc_number] => 20070200544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-30 [patent_title] => 'Method and apparatus providing final test and trimming for a power supply controller' [patent_app_type] => utility [patent_app_number] => 11/789924 [patent_app_country] => US [patent_app_date] => 2007-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6328 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0200/20070200544.pdf [firstpage_image] =>[orig_patent_app_number] => 11789924 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/789924
Method and apparatus providing final test and trimming for a power supply controller Apr 24, 2007 Issued
Array ( [id] => 4914164 [patent_doc_number] => 20080094764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-24 [patent_title] => 'POWER PLUG WITH LEAKAGE CURRENT DETECTION AND PROTECTION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 11/739665 [patent_app_country] => US [patent_app_date] => 2007-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3779 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0094/20080094764.pdf [firstpage_image] =>[orig_patent_app_number] => 11739665 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/739665
Power plug with leakage current detection and protection circuit Apr 23, 2007 Issued
Array ( [id] => 4576585 [patent_doc_number] => 07848073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-07 [patent_title] => 'Power supply controller' [patent_app_type] => utility [patent_app_number] => 11/785861 [patent_app_country] => US [patent_app_date] => 2007-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 12027 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/848/07848073.pdf [firstpage_image] =>[orig_patent_app_number] => 11785861 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/785861
Power supply controller Apr 19, 2007 Issued
Array ( [id] => 6420207 [patent_doc_number] => 20100142110 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-10 [patent_title] => 'DOUBLE-SIDED PRINTED CIRCUIT BOARD COMPRISING A STRIP CONDUCTOR SAFETY FUSE' [patent_app_type] => utility [patent_app_number] => 12/532161 [patent_app_country] => US [patent_app_date] => 2007-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2038 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20100142110.pdf [firstpage_image] =>[orig_patent_app_number] => 12532161 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/532161
Double-sided printed circuit board comprising a strip conductor safety fuse Apr 3, 2007 Issued
Array ( [id] => 296986 [patent_doc_number] => 07542263 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-02 [patent_title] => 'Overlay correction by reducing wafer slipping after alignment' [patent_app_type] => utility [patent_app_number] => 11/695949 [patent_app_country] => US [patent_app_date] => 2007-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 3413 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/542/07542263.pdf [firstpage_image] =>[orig_patent_app_number] => 11695949 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/695949
Overlay correction by reducing wafer slipping after alignment Apr 2, 2007 Issued
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