Robert L Deberadinis
Examiner (ID: 12586, Phone: (571)272-2049 , Office: P/2836 )
Most Active Art Unit | 2836 |
Art Unit(s) | 2836 |
Total Applications | 2918 |
Issued Applications | 2501 |
Pending Applications | 144 |
Abandoned Applications | 273 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 6371439
[patent_doc_number] => 20020118501
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-29
[patent_title] => 'Hot-swap protection circuit'
[patent_app_type] => new
[patent_app_number] => 10/029593
[patent_app_country] => US
[patent_app_date] => 2001-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5000
[patent_no_of_claims] => 41
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0118/20020118501.pdf
[firstpage_image] =>[orig_patent_app_number] => 10029593
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/029593 | Hot-swap protection circuit | Dec 20, 2001 | Issued |
Array
(
[id] => 6681888
[patent_doc_number] => 20030117752
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-26
[patent_title] => 'Microprocessor-controlled DC to DC converter with fault protection'
[patent_app_type] => new
[patent_app_number] => 10/034216
[patent_app_country] => US
[patent_app_date] => 2001-12-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3207
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0117/20030117752.pdf
[firstpage_image] =>[orig_patent_app_number] => 10034216
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/034216 | Microprocessor-controlled DC to DC converter with fault protection | Dec 19, 2001 | Issued |
Array
(
[id] => 7032175
[patent_doc_number] => 20050030684
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-02-10
[patent_title] => 'Low-voltage electronic residual current circuit breaker'
[patent_app_type] => utility
[patent_app_number] => 10/451541
[patent_app_country] => US
[patent_app_date] => 2001-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2519
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0030/20050030684.pdf
[firstpage_image] =>[orig_patent_app_number] => 10451541
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/451541 | Low-voltage electronic residual current circuit breaker | Dec 10, 2001 | Abandoned |
Array
(
[id] => 6754461
[patent_doc_number] => 20030002237
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-01-02
[patent_title] => 'Electrostatic clamping'
[patent_app_type] => new
[patent_app_number] => 10/182869
[patent_app_country] => US
[patent_app_date] => 2002-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1053
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 30
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0002/20030002237.pdf
[firstpage_image] =>[orig_patent_app_number] => 10182869
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/182869 | Method of clamping a wafer during a process that creates asymmetric stress in the wafer | Dec 3, 2001 | Issued |
Array
(
[id] => 6126217
[patent_doc_number] => 20020075616
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-06-20
[patent_title] => 'Protection system for an electricity network having a \"Bluetooth\" data transmission radio link'
[patent_app_type] => new
[patent_app_number] => 09/994681
[patent_app_country] => US
[patent_app_date] => 2001-11-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1006
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0075/20020075616.pdf
[firstpage_image] =>[orig_patent_app_number] => 09994681
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/994681 | Protection system for an electricity network having a data transmission radio link | Nov 27, 2001 | Issued |
Array
(
[id] => 1415856
[patent_doc_number] => 06538862
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-25
[patent_title] => 'Circuit breaker with a single test button mechanism'
[patent_app_type] => B1
[patent_app_number] => 09/683138
[patent_app_country] => US
[patent_app_date] => 2001-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 5433
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/538/06538862.pdf
[firstpage_image] =>[orig_patent_app_number] => 09683138
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/683138 | Circuit breaker with a single test button mechanism | Nov 25, 2001 | Issued |
Array
(
[id] => 6361148
[patent_doc_number] => 20020117132
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-08-29
[patent_title] => 'Method of estimating the effect of the parasitic currents in an electromagnetic actuator for the control of an engine valve'
[patent_app_type] => new
[patent_app_number] => 10/007860
[patent_app_country] => US
[patent_app_date] => 2001-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4301
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0117/20020117132.pdf
[firstpage_image] =>[orig_patent_app_number] => 10007860
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/007860 | Method of estimating the effect of the parasitic currents in an electromagnetic actuator for the control of an engine valve | Nov 12, 2001 | Issued |
Array
(
[id] => 1135379
[patent_doc_number] => 06788511
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-09-07
[patent_title] => 'Domain power notification system'
[patent_app_type] => B1
[patent_app_number] => 10/037735
[patent_app_country] => US
[patent_app_date] => 2001-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 3376
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/788/06788511.pdf
[firstpage_image] =>[orig_patent_app_number] => 10037735
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/037735 | Domain power notification system | Nov 8, 2001 | Issued |
Array
(
[id] => 1310070
[patent_doc_number] => 06621676
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-09-16
[patent_title] => 'Method and apparatus to oppose a short circuit failure mechanism in a printer drive circuit'
[patent_app_type] => B2
[patent_app_number] => 10/020057
[patent_app_country] => US
[patent_app_date] => 2001-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3137
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/621/06621676.pdf
[firstpage_image] =>[orig_patent_app_number] => 10020057
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/020057 | Method and apparatus to oppose a short circuit failure mechanism in a printer drive circuit | Oct 29, 2001 | Issued |
Array
(
[id] => 6303604
[patent_doc_number] => 20020093778
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-18
[patent_title] => 'Undervoltage tripping device'
[patent_app_type] => new
[patent_app_number] => 10/012159
[patent_app_country] => US
[patent_app_date] => 2001-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3297
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0093/20020093778.pdf
[firstpage_image] =>[orig_patent_app_number] => 10012159
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/012159 | Undervoltage tripping device | Oct 28, 2001 | Issued |
Array
(
[id] => 6651519
[patent_doc_number] => 20030076636
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-24
[patent_title] => 'On-chip ESD protection circuit with a substrate-triggered SCR device'
[patent_app_type] => new
[patent_app_number] => 09/682827
[patent_app_country] => US
[patent_app_date] => 2001-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 36
[patent_no_of_words] => 8507
[patent_no_of_claims] => 55
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0076/20030076636.pdf
[firstpage_image] =>[orig_patent_app_number] => 09682827
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/682827 | On-chip ESD protection circuit with a substrate-triggered SCR device | Oct 22, 2001 | Abandoned |
Array
(
[id] => 6812569
[patent_doc_number] => 20030072119
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-17
[patent_title] => 'Solid state switch with temperature compensated current limit'
[patent_app_type] => new
[patent_app_number] => 09/977136
[patent_app_country] => US
[patent_app_date] => 2001-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3015
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0072/20030072119.pdf
[firstpage_image] =>[orig_patent_app_number] => 09977136
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/977136 | Solid state switch with temperature compensated current limit | Oct 11, 2001 | Issued |
Array
(
[id] => 1371440
[patent_doc_number] => 06574082
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-06-03
[patent_title] => 'Methods and systems for operating temperature controls for electronic equipment'
[patent_app_type] => B2
[patent_app_number] => 09/973437
[patent_app_country] => US
[patent_app_date] => 2001-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5977
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 227
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/574/06574082.pdf
[firstpage_image] =>[orig_patent_app_number] => 09973437
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/973437 | Methods and systems for operating temperature controls for electronic equipment | Oct 8, 2001 | Issued |
Array
(
[id] => 6781976
[patent_doc_number] => 20030063423
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-03
[patent_title] => 'Thermal shutdown control for multi-channel integrated circuit boards'
[patent_app_type] => new
[patent_app_number] => 09/970540
[patent_app_country] => US
[patent_app_date] => 2001-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2289
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0063/20030063423.pdf
[firstpage_image] =>[orig_patent_app_number] => 09970540
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/970540 | Thermal shutdown control for multi-channel integrated circuit boards | Oct 2, 2001 | Issued |
Array
(
[id] => 607783
[patent_doc_number] => 07154722
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2006-12-26
[patent_title] => 'Loop control for distribution systems'
[patent_app_type] => utility
[patent_app_number] => 09/946232
[patent_app_country] => US
[patent_app_date] => 2001-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5795
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 293
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/154/07154722.pdf
[firstpage_image] =>[orig_patent_app_number] => 09946232
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/946232 | Loop control for distribution systems | Sep 4, 2001 | Issued |
Array
(
[id] => 6748999
[patent_doc_number] => 20030043519
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'Over-voltage protection and disconnect circuit apparatus and method'
[patent_app_type] => new
[patent_app_number] => 09/946774
[patent_app_country] => US
[patent_app_date] => 2001-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3000
[patent_no_of_claims] => 54
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0043/20030043519.pdf
[firstpage_image] =>[orig_patent_app_number] => 09946774
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/946774 | Over-voltage protection and disconnect circuit apparatus and method | Sep 3, 2001 | Abandoned |
Array
(
[id] => 6394993
[patent_doc_number] => 20020181177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-05
[patent_title] => 'CDM ESD protection design using deep N-well structure'
[patent_app_type] => new
[patent_app_number] => 09/942785
[patent_app_country] => US
[patent_app_date] => 2001-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 4534
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0181/20020181177.pdf
[firstpage_image] =>[orig_patent_app_number] => 09942785
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/942785 | CDM ESD protection design using deep N-well structure | Aug 30, 2001 | Issued |
Array
(
[id] => 6749002
[patent_doc_number] => 20030043522
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'Circuit breaker, trip assembly, bimetal compensation circuit and method including compensation for bimetal temperature coefficient'
[patent_app_type] => new
[patent_app_number] => 09/940176
[patent_app_country] => US
[patent_app_date] => 2001-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 8750
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0043/20030043522.pdf
[firstpage_image] =>[orig_patent_app_number] => 09940176
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/940176 | Circuit breaker, trip assembly, bimetal compensation circuit and method including compensation for bimetal temperature coefficient | Aug 26, 2001 | Issued |
Array
(
[id] => 6691652
[patent_doc_number] => 20030039084
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-27
[patent_title] => 'ESD protection system for high frequency applications'
[patent_app_type] => new
[patent_app_number] => 09/938040
[patent_app_country] => US
[patent_app_date] => 2001-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4123
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 277
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0039/20030039084.pdf
[firstpage_image] =>[orig_patent_app_number] => 09938040
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/938040 | ESD protection system for high frequency applications | Aug 22, 2001 | Issued |
Array
(
[id] => 1341564
[patent_doc_number] => 06597555
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-07-22
[patent_title] => 'Gate driver for thyristor'
[patent_app_type] => B2
[patent_app_number] => 09/934645
[patent_app_country] => US
[patent_app_date] => 2001-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6230
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/597/06597555.pdf
[firstpage_image] =>[orig_patent_app_number] => 09934645
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/934645 | Gate driver for thyristor | Aug 22, 2001 | Issued |