Search

Robert M. Kunemund

Examiner (ID: 1992, Phone: (571)272-1464 , Office: P/1714 )

Most Active Art Unit
1714
Art Unit(s)
1714, 1765, 1763, 1722, 1107, 1103, 1792, 1109
Total Applications
3564
Issued Applications
2783
Pending Applications
196
Abandoned Applications
615

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16677826 [patent_doc_number] => 20210066592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => Deposition Of Metal-Organic Oxide Films [patent_app_type] => utility [patent_app_number] => 17/000457 [patent_app_country] => US [patent_app_date] => 2020-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5524 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000457 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/000457
Deposition Of Metal-Organic Oxide Films Aug 23, 2020 Abandoned
Array ( [id] => 17417208 [patent_doc_number] => 20220052112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-17 [patent_title] => MEMORY DEVICE, MEMORY ARRAY AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/994746 [patent_app_country] => US [patent_app_date] => 2020-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16994746 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/994746
Memory device, memory array and method of forming the same Aug 16, 2020 Issued
Array ( [id] => 17002514 [patent_doc_number] => 11081336 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Method of making graphene and graphene devices [patent_app_type] => utility [patent_app_number] => 16/988475 [patent_app_country] => US [patent_app_date] => 2020-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2641 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16988475 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/988475
Method of making graphene and graphene devices Aug 6, 2020 Issued
Array ( [id] => 16440354 [patent_doc_number] => 20200357681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-12 [patent_title] => Devices and Methods for Radiation Hardening Integrated Circuits Using Shallow Trench Isolation [patent_app_type] => utility [patent_app_number] => 16/937881 [patent_app_country] => US [patent_app_date] => 2020-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9624 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 389 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16937881 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/937881
Devices and methods for radiation hardening integrated circuits using shallow trench isolation Jul 23, 2020 Issued
Array ( [id] => 18331913 [patent_doc_number] => 11637171 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Package-embedded thin-film capacitors, package-integral magnetic inductors, and methods of assembling same [patent_app_type] => utility [patent_app_number] => 16/934873 [patent_app_country] => US [patent_app_date] => 2020-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 6668 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16934873 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/934873
Package-embedded thin-film capacitors, package-integral magnetic inductors, and methods of assembling same Jul 20, 2020 Issued
Array ( [id] => 17339518 [patent_doc_number] => 20220005849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-06 [patent_title] => METAL DEEP TRENCH ISOLATION BIASING SOLUTION [patent_app_type] => utility [patent_app_number] => 16/918929 [patent_app_country] => US [patent_app_date] => 2020-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9808 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -44 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16918929 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/918929
Metal deep trench isolation biasing solution Jun 30, 2020 Issued
Array ( [id] => 17303215 [patent_doc_number] => 20210399054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-23 [patent_title] => MEMORY ARRAY WITH ASYMMETRIC BIT-LINE ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 16/908896 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11441 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16908896 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/908896
Memory array with asymmetric bit-line architecture Jun 22, 2020 Issued
Array ( [id] => 17818668 [patent_doc_number] => 11424292 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-23 [patent_title] => Memory array containing capped aluminum access lines and method of making the same [patent_app_type] => utility [patent_app_number] => 16/907523 [patent_app_country] => US [patent_app_date] => 2020-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 37 [patent_no_of_words] => 11072 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16907523 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/907523
Memory array containing capped aluminum access lines and method of making the same Jun 21, 2020 Issued
Array ( [id] => 17366162 [patent_doc_number] => 11233195 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-25 [patent_title] => Memory devices and methods of forming memory devices [patent_app_type] => utility [patent_app_number] => 16/893578 [patent_app_country] => US [patent_app_date] => 2020-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5125 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16893578 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/893578
Memory devices and methods of forming memory devices Jun 4, 2020 Issued
Array ( [id] => 17047942 [patent_doc_number] => 11101132 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Method and device for bonding of substrates [patent_app_type] => utility [patent_app_number] => 16/880139 [patent_app_country] => US [patent_app_date] => 2020-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 10591 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16880139 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/880139
Method and device for bonding of substrates May 20, 2020 Issued
Array ( [id] => 16936944 [patent_doc_number] => 20210202833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => VARIABLE RESISTANCE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/875119 [patent_app_country] => US [patent_app_date] => 2020-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10266 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16875119 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/875119
Variable resistance memory device May 14, 2020 Issued
Array ( [id] => 18032158 [patent_doc_number] => 11515358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-29 [patent_title] => Semiconductor devices including a passive material between memory cells and conductive access lines [patent_app_type] => utility [patent_app_number] => 16/863555 [patent_app_country] => US [patent_app_date] => 2020-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7951 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16863555 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/863555
Semiconductor devices including a passive material between memory cells and conductive access lines Apr 29, 2020 Issued
Array ( [id] => 17700439 [patent_doc_number] => 11374174 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-28 [patent_title] => Deposition mask and method of manufacturing display device using the same [patent_app_type] => utility [patent_app_number] => 16/861350 [patent_app_country] => US [patent_app_date] => 2020-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 6723 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16861350 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/861350
Deposition mask and method of manufacturing display device using the same Apr 28, 2020 Issued
Array ( [id] => 16487957 [patent_doc_number] => 20200381566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => NAND FLASH MEMORY WITH VERTICAL CELL STACK STRUCTURE AND METHOD FOR MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 16/816520 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9269 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16816520 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/816520
NAND flash memory with vertical cell stack structure and method for manufacturing same Mar 11, 2020 Issued
Array ( [id] => 16098357 [patent_doc_number] => 20200203165 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => METHOD AND DEVICE FOR BONDING OF SUBSTRATES [patent_app_type] => utility [patent_app_number] => 16/809651 [patent_app_country] => US [patent_app_date] => 2020-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10574 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16809651 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/809651
Method and device for bonding of substrates Mar 4, 2020 Issued
Array ( [id] => 18137244 [patent_doc_number] => 11562933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-24 [patent_title] => Method of detecting a possible thinning of a substrate of an integrated circuit via the rear face thereof, and associated device [patent_app_type] => utility [patent_app_number] => 16/800448 [patent_app_country] => US [patent_app_date] => 2020-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4485 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16800448 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/800448
Method of detecting a possible thinning of a substrate of an integrated circuit via the rear face thereof, and associated device Feb 24, 2020 Issued
Array ( [id] => 16210679 [patent_doc_number] => 20200243669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-30 [patent_title] => Semiconductor Device, Method for Manufacturing Semiconductor Device, and Electronic Appliance Having Semiconductor Device [patent_app_type] => utility [patent_app_number] => 16/778103 [patent_app_country] => US [patent_app_date] => 2020-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16778103 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/778103
Semiconductor device, method for manufacturing semiconductor device, and electronic appliance having semiconductor device Jan 30, 2020 Issued
Array ( [id] => 15905871 [patent_doc_number] => 20200152456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => SYSTEMS AND METHOD FOR INTEGRATED DEVICES ON AN ENGINEERED SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/742734 [patent_app_country] => US [patent_app_date] => 2020-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18262 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16742734 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/742734
Systems and method for integrated devices on an engineered substrate Jan 13, 2020 Issued
Array ( [id] => 15873481 [patent_doc_number] => 20200144144 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => Fine Pitch Bva Using Reconstituted Wafer With Area Array Accessible For Testing [patent_app_type] => utility [patent_app_number] => 16/734758 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16734758 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/734758
Fine pitch bva using reconstituted wafer with area array accessible for testing Jan 5, 2020 Issued
Array ( [id] => 16820021 [patent_doc_number] => 11004860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Non-volatile memory device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 16/733539 [patent_app_country] => US [patent_app_date] => 2020-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 10393 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16733539 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/733539
Non-volatile memory device and method for fabricating the same Jan 2, 2020 Issued
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