Robert P. Limanek

Array ( [id] => 2901653 [patent_doc_number] => 05177576 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-05 [patent_title] => 'Dynamic random access memory having trench capacitors and vertical transistors' [patent_app_type] => 1 [patent_app_number] => 7/695984 [patent_app_country] => US [patent_app_date] => 1991-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 29 [patent_no_of_words] => 5155 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 455 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/177/05177576.pdf [firstpage_image] =>[orig_patent_app_number] => 695984 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2811877 [patent_doc_number] => 05146302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-08 [patent_title] => 'Charge skimming solid-state imaging device including sampling circuits' [patent_app_type] => 1 [patent_app_number] => 7/695344 [patent_app_country] => US [patent_app_date] => 1991-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3342 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/146/05146302.pdf [firstpage_image] =>[orig_patent_app_number] => 695344 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2884827 [patent_doc_number] => 05159416 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-27 [patent_title] => 'Thin-film-transistor having Schottky barrier' [patent_app_type] => 1 [patent_app_number] => 7/691802 [patent_app_country] => US [patent_app_date] => 1991-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 2881 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/159/05159416.pdf [firstpage_image] =>[orig_patent_app_number] => 691802 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2828318 [patent_doc_number] => 05173752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-22 [patent_title] => 'Semiconductor device having interconnection layer contacting source/drain regions' [patent_app_type] => 1 [patent_app_number] => 7/690824 [patent_app_country] => US [patent_app_date] => 1991-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 46 [patent_no_of_words] => 4970 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/173/05173752.pdf [firstpage_image] =>[orig_patent_app_number] => 690824 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2867201 [patent_doc_number] => 05150178 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-22 [patent_title] => 'Gate structure for a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 7/690660 [patent_app_country] => US [patent_app_date] => 1991-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2100 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/150/05150178.pdf [firstpage_image] =>[orig_patent_app_number] => 690660 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2926248 [patent_doc_number] => 05200635 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-06 [patent_title] => 'Semiconductor device having a low-resistivity planar wiring structure' [patent_app_type] => 1 [patent_app_number] => 7/686757 [patent_app_country] => US [patent_app_date] => 1991-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 74 [patent_no_of_words] => 13841 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/200/05200635.pdf [firstpage_image] =>[orig_patent_app_number] => 686757 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2814071 [patent_doc_number] => 05157469 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-20 [patent_title] => 'Field effect transistor having a multilayer interconnection layer therein with tapered sidewall insulators' [patent_app_type] => 1 [patent_app_number] => 7/685398 [patent_app_country] => US [patent_app_date] => 1991-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4638 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/157/05157469.pdf [firstpage_image] =>[orig_patent_app_number] => 685398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2687211 [patent_doc_number] => 05066996 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-11-19 [patent_title] => 'Channelless gate array with a shared bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 7/684513 [patent_app_country] => US [patent_app_date] => 1991-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2527 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/066/05066996.pdf [firstpage_image] =>[orig_patent_app_number] => 684513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2859203 [patent_doc_number] => 05134450 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-28 [patent_title] => 'Parallel transistor circuit with non-volatile function' [patent_app_type] => 1 [patent_app_number] => 7/682824 [patent_app_country] => US [patent_app_date] => 1991-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2451 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/134/05134450.pdf [firstpage_image] =>[orig_patent_app_number] => 682824 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2942556 [patent_doc_number] => 05247346 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-21 [patent_title] => 'E.sup.2 PROM cell array including single charge emitting means per row' [patent_app_type] => 1 [patent_app_number] => 7/677349 [patent_app_country] => US [patent_app_date] => 1991-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 7586 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/247/05247346.pdf [firstpage_image] =>[orig_patent_app_number] => 677349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3049669 [patent_doc_number] => 05287000 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-02-15 [patent_title] => 'Resin-encapsulated semiconductor memory device useful for single in-line packages' [patent_app_type] => 1 [patent_app_number] => 7/674969 [patent_app_country] => US [patent_app_date] => 1991-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 16416 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/287/05287000.pdf [firstpage_image] =>[orig_patent_app_number] => 674969 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2918475 [patent_doc_number] => 05216630 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-01 [patent_title] => 'Static semiconductor memory device using bipolar transistor' [patent_app_type] => 1 [patent_app_number] => 7/675628 [patent_app_country] => US [patent_app_date] => 1991-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 20514 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/216/05216630.pdf [firstpage_image] =>[orig_patent_app_number] => 675628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3061327 [patent_doc_number] => 05325325 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-28 [patent_title] => 'Semiconductor memory device capable of initializing storage data' [patent_app_type] => 1 [patent_app_number] => 7/673532 [patent_app_country] => US [patent_app_date] => 1991-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 26 [patent_no_of_words] => 15108 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/325/05325325.pdf [firstpage_image] =>[orig_patent_app_number] => 673532 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2859185 [patent_doc_number] => 05134449 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-07-28 [patent_title] => 'Nonvolatile memory cell with field-plate switch' [patent_app_type] => 1 [patent_app_number] => 7/661590 [patent_app_country] => US [patent_app_date] => 1991-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 5178 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/134/05134449.pdf [firstpage_image] =>[orig_patent_app_number] => 661590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2845142 [patent_doc_number] => 05160988 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-11-03 [patent_title] => 'Semiconductor device with composite surface insulator' [patent_app_type] => 1 [patent_app_number] => 7/657934 [patent_app_country] => US [patent_app_date] => 1991-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2017 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/160/05160988.pdf [firstpage_image] =>[orig_patent_app_number] => 657934 [rel_patent_id] =>[rel_patent_doc_number] =>)