
Robert P. Limanek
Examiner (ID: 889)
| Most Active Art Unit | 2508 |
| Art Unit(s) | 2508, 2503, 1205 |
| Total Applications | 673 |
| Issued Applications | 527 |
| Pending Applications | 1 |
| Abandoned Applications | 145 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3012354
[patent_doc_number] => 05355006
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-10-11
[patent_title] => 'Semiconductor memory device with source and drain limited to areas near the gate electrodes'
[patent_app_type] => 1
[patent_app_number] => 8/201706
[patent_app_country] => US
[patent_app_date] => 1994-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 3505
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 176
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/355/05355006.pdf
[firstpage_image] =>[orig_patent_app_number] => 201706
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/201706 | Semiconductor memory device with source and drain limited to areas near the gate electrodes | Feb 24, 1994 | Issued |
Array
(
[id] => 3060073
[patent_doc_number] => 05357134
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-10-18
[patent_title] => 'Nonvolatile semiconductor device having charge trap film containing silicon crystal grains'
[patent_app_type] => 1
[patent_app_number] => 8/200313
[patent_app_country] => US
[patent_app_date] => 1994-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 22
[patent_no_of_words] => 3598
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/357/05357134.pdf
[firstpage_image] =>[orig_patent_app_number] => 200313
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/200313 | Nonvolatile semiconductor device having charge trap film containing silicon crystal grains | Feb 22, 1994 | Issued |
Array
(
[id] => 3425511
[patent_doc_number] => 05389808
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-02-14
[patent_title] => 'Non-volatile semiconductor memory with increased capacitance between floating and control gates'
[patent_app_type] => 1
[patent_app_number] => 8/199018
[patent_app_country] => US
[patent_app_date] => 1994-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 17
[patent_no_of_words] => 5501
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 173
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/389/05389808.pdf
[firstpage_image] =>[orig_patent_app_number] => 199018
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/199018 | Non-volatile semiconductor memory with increased capacitance between floating and control gates | Feb 17, 1994 | Issued |
Array
(
[id] => 3485366
[patent_doc_number] => 05406107
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-11
[patent_title] => 'Static semiconductor memory device having capacitors for increased soft error immunity'
[patent_app_type] => 1
[patent_app_number] => 8/195034
[patent_app_country] => US
[patent_app_date] => 1994-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 5330
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 216
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/406/05406107.pdf
[firstpage_image] =>[orig_patent_app_number] => 195034
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/195034 | Static semiconductor memory device having capacitors for increased soft error immunity | Feb 13, 1994 | Issued |
Array
(
[id] => 3491630
[patent_doc_number] => 05475250
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-12
[patent_title] => 'Matrix of EPROM memory cells with a tablecloth structure having an improved capacitive ratio and a process for its manufacture'
[patent_app_type] => 1
[patent_app_number] => 8/191667
[patent_app_country] => US
[patent_app_date] => 1994-02-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 2221
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/475/05475250.pdf
[firstpage_image] =>[orig_patent_app_number] => 191667
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/191667 | Matrix of EPROM memory cells with a tablecloth structure having an improved capacitive ratio and a process for its manufacture | Feb 3, 1994 | Issued |
Array
(
[id] => 3416142
[patent_doc_number] => 05412246
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-02
[patent_title] => 'Low temperature plasma oxidation process'
[patent_app_type] => 1
[patent_app_number] => 8/186568
[patent_app_country] => US
[patent_app_date] => 1994-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 8
[patent_no_of_words] => 3695
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/412/05412246.pdf
[firstpage_image] =>[orig_patent_app_number] => 186568
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/186568 | Low temperature plasma oxidation process | Jan 25, 1994 | Issued |
Array
(
[id] => 3485284
[patent_doc_number] => 05406103
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-11
[patent_title] => 'Semiconductor memory device with stacked capacitor above bit lines'
[patent_app_type] => 1
[patent_app_number] => 8/187020
[patent_app_country] => US
[patent_app_date] => 1994-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 5086
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/406/05406103.pdf
[firstpage_image] =>[orig_patent_app_number] => 187020
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/187020 | Semiconductor memory device with stacked capacitor above bit lines | Jan 25, 1994 | Issued |
Array
(
[id] => 3018626
[patent_doc_number] => 05355331
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-10-11
[patent_title] => 'Semiconductor memory device having electrically isolated memory and logic sections'
[patent_app_type] => 1
[patent_app_number] => 8/185169
[patent_app_country] => US
[patent_app_date] => 1994-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 3359
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/355/05355331.pdf
[firstpage_image] =>[orig_patent_app_number] => 185169
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/185169 | Semiconductor memory device having electrically isolated memory and logic sections | Jan 23, 1994 | Issued |
Array
(
[id] => 3124105
[patent_doc_number] => 05381028
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-01-10
[patent_title] => 'Nonvolatile semiconductor memory with raised source and drain'
[patent_app_type] => 1
[patent_app_number] => 8/183852
[patent_app_country] => US
[patent_app_date] => 1994-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 2749
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/381/05381028.pdf
[firstpage_image] =>[orig_patent_app_number] => 183852
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/183852 | Nonvolatile semiconductor memory with raised source and drain | Jan 20, 1994 | Issued |
Array
(
[id] => 3494449
[patent_doc_number] => 05440169
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-08
[patent_title] => 'Resin-packaged semiconductor device with flow prevention dimples'
[patent_app_type] => 1
[patent_app_number] => 8/177380
[patent_app_country] => US
[patent_app_date] => 1994-01-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 2934
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/440/05440169.pdf
[firstpage_image] =>[orig_patent_app_number] => 177380
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/177380 | Resin-packaged semiconductor device with flow prevention dimples | Jan 4, 1994 | Issued |
Array
(
[id] => 3016772
[patent_doc_number] => 05332917
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-07-26
[patent_title] => 'Semiconductor memory NAND with wide space between selection lines'
[patent_app_type] => 1
[patent_app_number] => 8/170884
[patent_app_country] => US
[patent_app_date] => 1993-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2604
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 60
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/332/05332917.pdf
[firstpage_image] =>[orig_patent_app_number] => 170884
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/170884 | Semiconductor memory NAND with wide space between selection lines | Dec 20, 1993 | Issued |
Array
(
[id] => 3429961
[patent_doc_number] => 05416349
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-05-16
[patent_title] => 'Increased-density flash EPROM that requires less area to form the metal bit line-to-drain contacts'
[patent_app_type] => 1
[patent_app_number] => 8/168756
[patent_app_country] => US
[patent_app_date] => 1993-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 22
[patent_no_of_words] => 7319
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 335
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/416/05416349.pdf
[firstpage_image] =>[orig_patent_app_number] => 168756
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/168756 | Increased-density flash EPROM that requires less area to form the metal bit line-to-drain contacts | Dec 15, 1993 | Issued |
Array
(
[id] => 3416371
[patent_doc_number] => 05444276
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-22
[patent_title] => 'Semiconductor integrated circuit macro cells with wide lines'
[patent_app_type] => 1
[patent_app_number] => 8/165944
[patent_app_country] => US
[patent_app_date] => 1993-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 24
[patent_no_of_words] => 7055
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/444/05444276.pdf
[firstpage_image] =>[orig_patent_app_number] => 165944
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/165944 | Semiconductor integrated circuit macro cells with wide lines | Dec 13, 1993 | Issued |
| 08/164278 | HIGH-DENSITY READ-ONLY DATA STORAGE | Dec 8, 1993 | Abandoned |
Array
(
[id] => 3530477
[patent_doc_number] => 05541427
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-30
[patent_title] => 'SRAM cell with capacitor'
[patent_app_type] => 1
[patent_app_number] => 8/162588
[patent_app_country] => US
[patent_app_date] => 1993-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 3495
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/541/05541427.pdf
[firstpage_image] =>[orig_patent_app_number] => 162588
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/162588 | SRAM cell with capacitor | Dec 2, 1993 | Issued |
Array
(
[id] => 3483922
[patent_doc_number] => 05399892
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-03-21
[patent_title] => 'Mesh geometry for MOS-gated semiconductor devices'
[patent_app_type] => 1
[patent_app_number] => 8/158444
[patent_app_country] => US
[patent_app_date] => 1993-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 11
[patent_no_of_words] => 1827
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/399/05399892.pdf
[firstpage_image] =>[orig_patent_app_number] => 158444
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/158444 | Mesh geometry for MOS-gated semiconductor devices | Nov 28, 1993 | Issued |
Array
(
[id] => 3478604
[patent_doc_number] => 05428237
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-06-27
[patent_title] => 'Semiconductor device having an insulated gate transistor'
[patent_app_type] => 1
[patent_app_number] => 8/158371
[patent_app_country] => US
[patent_app_date] => 1993-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 59
[patent_figures_cnt] => 97
[patent_no_of_words] => 21039
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/428/05428237.pdf
[firstpage_image] =>[orig_patent_app_number] => 158371
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/158371 | Semiconductor device having an insulated gate transistor | Nov 28, 1993 | Issued |
Array
(
[id] => 3463591
[patent_doc_number] => 05442211
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-15
[patent_title] => 'One-transistor one-capacitor memory cell structure for DRAMs'
[patent_app_type] => 1
[patent_app_number] => 8/156620
[patent_app_country] => US
[patent_app_date] => 1993-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 3199
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/442/05442211.pdf
[firstpage_image] =>[orig_patent_app_number] => 156620
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/156620 | One-transistor one-capacitor memory cell structure for DRAMs | Nov 22, 1993 | Issued |
| 08/153878 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME | Nov 16, 1993 | Abandoned |
Array
(
[id] => 3466588
[patent_doc_number] => 05402372
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-03-28
[patent_title] => 'High density EEPROM cell array with improved access time and method of manufacture'
[patent_app_type] => 1
[patent_app_number] => 8/152408
[patent_app_country] => US
[patent_app_date] => 1993-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 28
[patent_no_of_words] => 8273
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 494
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/402/05402372.pdf
[firstpage_image] =>[orig_patent_app_number] => 152408
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/152408 | High density EEPROM cell array with improved access time and method of manufacture | Nov 14, 1993 | Issued |