| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_doc_number] => 05079549
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-01-07
[patent_title] => 'Digital resolver with a synchronous multiple count generation'
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[patent_app_number] => 7/572672
[patent_app_country] => US
[patent_app_date] => 1990-08-24
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| 07/568363 | DATA COMPRESSION/DECOMPRESSION PROCESSOR | Aug 15, 1990 | Abandoned |
Array
(
[id] => 2884513
[patent_doc_number] => 05119096
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-06-02
[patent_title] => 'Analog to frequency converter with balancing compensation cycles'
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[patent_app_number] => 7/566558
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 566558
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/566558 | Analog to frequency converter with balancing compensation cycles | Aug 12, 1990 | Issued |
| 07/568294 | HEAT FLOW DETECTOR FOR RECESSED INCANDESCENT FIXTURES | Aug 12, 1990 | Abandoned |
| 07/562552 | HIGH RESOLUTION MONOLITH INTEGRATED ANALOGUE-TO-DIGITAL CONVERTER | Aug 2, 1990 | Abandoned |
Array
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[patent_doc_number] => 05059977
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[patent_kind] => NA
[patent_issue_date] => 1991-10-22
[patent_title] => 'Synchronizing switch arrangement for a digital-to-analog converter to reduce in-band switching transients'
[patent_app_type] => 1
[patent_app_number] => 7/562165
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Array
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[id] => 2855739
[patent_doc_number] => 05105192
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[patent_kind] => NA
[patent_issue_date] => 1992-04-14
[patent_title] => 'Method and apparatus for detecting a sampling-period sync signal from an output signal of a digital-to-analog converter'
[patent_app_type] => 1
[patent_app_number] => 7/559062
[patent_app_country] => US
[patent_app_date] => 1990-07-30
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/559062 | Method and apparatus for detecting a sampling-period sync signal from an output signal of a digital-to-analog converter | Jul 29, 1990 | Issued |
| 07/557433 | DIGITAL-ANALOG CONVERTER | Jul 22, 1990 | Abandoned |
Array
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-07-09
[patent_title] => 'Charge domain block matching processor'
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Array
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Array
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[id] => 2755583
[patent_doc_number] => 05021784
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[patent_kind] => NA
[patent_issue_date] => 1991-06-04
[patent_title] => 'Calibrated current source with ripple reduction'
[patent_app_type] => 1
[patent_app_number] => 7/547901
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[firstpage_image] =>[orig_patent_app_number] => 547901
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/547901 | Calibrated current source with ripple reduction | Jul 1, 1990 | Issued |
Array
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[id] => 2827223
[patent_doc_number] => 05173695
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-22
[patent_title] => 'High-speed flexible variable-length-code decoder'
[patent_app_type] => 1
[patent_app_number] => 7/546415
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/546415 | High-speed flexible variable-length-code decoder | Jun 28, 1990 | Issued |
Array
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[id] => 2751598
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[patent_kind] => NA
[patent_issue_date] => 1991-04-30
[patent_title] => 'Parallel to serial converter with complementary bit insertion for disparity reduction'
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[firstpage_image] =>[orig_patent_app_number] => 544259
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/544259 | Parallel to serial converter with complementary bit insertion for disparity reduction | Jun 25, 1990 | Issued |
Array
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[patent_issue_date] => 1991-10-22
[patent_title] => 'Digital control circuit for tuning systems with a pulse density modulation digital to analog converter'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 07/538954 | Digital control circuit for tuning systems with a pulse density modulation digital to analog converter | Jun 14, 1990 | Issued |
Array
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Array
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Array
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Array
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