Search

Robert R. Raevis

Examiner (ID: 9425, Phone: (571)272-2204 , Office: P/2856 )

Most Active Art Unit
2856
Art Unit(s)
2855, 3621, 2502, 2212, 2856, 2605, 2607, 2861
Total Applications
6011
Issued Applications
4922
Pending Applications
293
Abandoned Applications
846

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2819968 [patent_doc_number] => 05079549 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-07 [patent_title] => 'Digital resolver with a synchronous multiple count generation' [patent_app_type] => 1 [patent_app_number] => 7/572672 [patent_app_country] => US [patent_app_date] => 1990-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4211 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/079/05079549.pdf [firstpage_image] =>[orig_patent_app_number] => 572672 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/572672
Digital resolver with a synchronous multiple count generation Aug 23, 1990 Issued
07/568363 DATA COMPRESSION/DECOMPRESSION PROCESSOR Aug 15, 1990 Abandoned
Array ( [id] => 2884513 [patent_doc_number] => 05119096 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Analog to frequency converter with balancing compensation cycles' [patent_app_type] => 1 [patent_app_number] => 7/566558 [patent_app_country] => US [patent_app_date] => 1990-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3162 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119096.pdf [firstpage_image] =>[orig_patent_app_number] => 566558 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/566558
Analog to frequency converter with balancing compensation cycles Aug 12, 1990 Issued
07/568294 HEAT FLOW DETECTOR FOR RECESSED INCANDESCENT FIXTURES Aug 12, 1990 Abandoned
07/562552 HIGH RESOLUTION MONOLITH INTEGRATED ANALOGUE-TO-DIGITAL CONVERTER Aug 2, 1990 Abandoned
Array ( [id] => 2766065 [patent_doc_number] => 05059977 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'Synchronizing switch arrangement for a digital-to-analog converter to reduce in-band switching transients' [patent_app_type] => 1 [patent_app_number] => 7/562165 [patent_app_country] => US [patent_app_date] => 1990-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 6544 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/059/05059977.pdf [firstpage_image] =>[orig_patent_app_number] => 562165 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/562165
Synchronizing switch arrangement for a digital-to-analog converter to reduce in-band switching transients Aug 2, 1990 Issued
Array ( [id] => 2855739 [patent_doc_number] => 05105192 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-14 [patent_title] => 'Method and apparatus for detecting a sampling-period sync signal from an output signal of a digital-to-analog converter' [patent_app_type] => 1 [patent_app_number] => 7/559062 [patent_app_country] => US [patent_app_date] => 1990-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 8127 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/105/05105192.pdf [firstpage_image] =>[orig_patent_app_number] => 559062 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/559062
Method and apparatus for detecting a sampling-period sync signal from an output signal of a digital-to-analog converter Jul 29, 1990 Issued
07/557433 DIGITAL-ANALOG CONVERTER Jul 22, 1990 Abandoned
Array ( [id] => 2754946 [patent_doc_number] => 05030953 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-09 [patent_title] => 'Charge domain block matching processor' [patent_app_type] => 1 [patent_app_number] => 7/551947 [patent_app_country] => US [patent_app_date] => 1990-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4241 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 850 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/030/05030953.pdf [firstpage_image] =>[orig_patent_app_number] => 551947 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/551947
Charge domain block matching processor Jul 10, 1990 Issued
Array ( [id] => 2820004 [patent_doc_number] => 05079551 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-01-07 [patent_title] => '.DELTA..SIGMA. digital-to-analog converter with bit grouping by significance for reducing feedback computation time' [patent_app_type] => 1 [patent_app_number] => 7/550517 [patent_app_country] => US [patent_app_date] => 1990-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3318 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/079/05079551.pdf [firstpage_image] =>[orig_patent_app_number] => 550517 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/550517
.DELTA..SIGMA. digital-to-analog converter with bit grouping by significance for reducing feedback computation time Jul 9, 1990 Issued
Array ( [id] => 2755583 [patent_doc_number] => 05021784 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-04 [patent_title] => 'Calibrated current source with ripple reduction' [patent_app_type] => 1 [patent_app_number] => 7/547901 [patent_app_country] => US [patent_app_date] => 1990-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 4075 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/021/05021784.pdf [firstpage_image] =>[orig_patent_app_number] => 547901 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/547901
Calibrated current source with ripple reduction Jul 1, 1990 Issued
Array ( [id] => 2827223 [patent_doc_number] => 05173695 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-12-22 [patent_title] => 'High-speed flexible variable-length-code decoder' [patent_app_type] => 1 [patent_app_number] => 7/546415 [patent_app_country] => US [patent_app_date] => 1990-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4729 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/173/05173695.pdf [firstpage_image] =>[orig_patent_app_number] => 546415 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/546415
High-speed flexible variable-length-code decoder Jun 28, 1990 Issued
Array ( [id] => 2751598 [patent_doc_number] => 05012240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-04-30 [patent_title] => 'Parallel to serial converter with complementary bit insertion for disparity reduction' [patent_app_type] => 1 [patent_app_number] => 7/544259 [patent_app_country] => US [patent_app_date] => 1990-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3794 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/012/05012240.pdf [firstpage_image] =>[orig_patent_app_number] => 544259 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/544259
Parallel to serial converter with complementary bit insertion for disparity reduction Jun 25, 1990 Issued
Array ( [id] => 2766102 [patent_doc_number] => 05059979 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-22 [patent_title] => 'Digital control circuit for tuning systems with a pulse density modulation digital to analog converter' [patent_app_type] => 1 [patent_app_number] => 7/538954 [patent_app_country] => US [patent_app_date] => 1990-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4220 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/059/05059979.pdf [firstpage_image] =>[orig_patent_app_number] => 538954 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/538954
Digital control circuit for tuning systems with a pulse density modulation digital to analog converter Jun 14, 1990 Issued
Array ( [id] => 3427214 [patent_doc_number] => 05389925 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-14 [patent_title] => 'A/D and D/A conversion device with shared parameter generators' [patent_app_type] => 1 [patent_app_number] => 7/537954 [patent_app_country] => US [patent_app_date] => 1990-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2377 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/389/05389925.pdf [firstpage_image] =>[orig_patent_app_number] => 537954 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/537954
A/D and D/A conversion device with shared parameter generators Jun 12, 1990 Issued
Array ( [id] => 2750402 [patent_doc_number] => 05023610 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-11 [patent_title] => 'Data compression method using textual substitution' [patent_app_type] => 1 [patent_app_number] => 7/537502 [patent_app_country] => US [patent_app_date] => 1990-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 5 [patent_no_of_words] => 4783 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/023/05023610.pdf [firstpage_image] =>[orig_patent_app_number] => 537502 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/537502
Data compression method using textual substitution Jun 12, 1990 Issued
Array ( [id] => 2716047 [patent_doc_number] => 05017919 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-21 [patent_title] => 'Digital-to-analog converter with bit weight segmented arrays' [patent_app_type] => 1 [patent_app_number] => 7/533885 [patent_app_country] => US [patent_app_date] => 1990-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9697 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/017/05017919.pdf [firstpage_image] =>[orig_patent_app_number] => 533885 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/533885
Digital-to-analog converter with bit weight segmented arrays Jun 5, 1990 Issued
Array ( [id] => 2678792 [patent_doc_number] => 05027120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-06-25 [patent_title] => 'Delta-sigma converter with bandpass filter for noise reduction in receivers' [patent_app_type] => 1 [patent_app_number] => 7/528977 [patent_app_country] => US [patent_app_date] => 1990-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4115 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/027/05027120.pdf [firstpage_image] =>[orig_patent_app_number] => 528977 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/528977
Delta-sigma converter with bandpass filter for noise reduction in receivers May 24, 1990 Issued
Array ( [id] => 2769481 [patent_doc_number] => 04994807 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-19 [patent_title] => 'Voltage-to-frequency converter' [patent_app_type] => 1 [patent_app_number] => 7/529972 [patent_app_country] => US [patent_app_date] => 1990-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5591 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/994/04994807.pdf [firstpage_image] =>[orig_patent_app_number] => 529972 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/529972
Voltage-to-frequency converter May 24, 1990 Issued
Array ( [id] => 2730585 [patent_doc_number] => 05057838 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-10-15 [patent_title] => 'D/A converter having centered switching sequence and centered arrangement of converter segment groups' [patent_app_type] => 1 [patent_app_number] => 7/526904 [patent_app_country] => US [patent_app_date] => 1990-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5152 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/057/05057838.pdf [firstpage_image] =>[orig_patent_app_number] => 526904 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/526904
D/A converter having centered switching sequence and centered arrangement of converter segment groups May 21, 1990 Issued
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