
Robert R. Raevis
Examiner (ID: 9425, Phone: (571)272-2204 , Office: P/2856 )
| Most Active Art Unit | 2856 |
| Art Unit(s) | 2855, 3621, 2502, 2212, 2856, 2605, 2607, 2861 |
| Total Applications | 6011 |
| Issued Applications | 4922 |
| Pending Applications | 293 |
| Abandoned Applications | 846 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 979767
[patent_doc_number] => 06930624
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-16
[patent_title] => 'Continuous time fourth order delta sigma analog-to-digital converter'
[patent_app_type] => utility
[patent_app_number] => 10/699585
[patent_app_country] => US
[patent_app_date] => 2003-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4924
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/930/06930624.pdf
[firstpage_image] =>[orig_patent_app_number] => 10699585
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/699585 | Continuous time fourth order delta sigma analog-to-digital converter | Oct 30, 2003 | Issued |
Array
(
[id] => 994249
[patent_doc_number] => 06917314
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-07-12
[patent_title] => 'Method and apparatus for DC-level constrained coding'
[patent_app_type] => utility
[patent_app_number] => 10/695531
[patent_app_country] => US
[patent_app_date] => 2003-10-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 3100
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/917/06917314.pdf
[firstpage_image] =>[orig_patent_app_number] => 10695531
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/695531 | Method and apparatus for DC-level constrained coding | Oct 27, 2003 | Issued |
Array
(
[id] => 1006535
[patent_doc_number] => 06906645
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-14
[patent_title] => 'Data compression having more effective compression'
[patent_app_type] => utility
[patent_app_number] => 10/693644
[patent_app_country] => US
[patent_app_date] => 2003-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 6
[patent_no_of_words] => 4563
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/906/06906645.pdf
[firstpage_image] =>[orig_patent_app_number] => 10693644
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/693644 | Data compression having more effective compression | Oct 26, 2003 | Issued |
Array
(
[id] => 1006551
[patent_doc_number] => 06906656
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-14
[patent_title] => 'Flash type analog to digital converting method and circuit'
[patent_app_type] => utility
[patent_app_number] => 10/688286
[patent_app_country] => US
[patent_app_date] => 2003-10-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 4208
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/906/06906656.pdf
[firstpage_image] =>[orig_patent_app_number] => 10688286
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/688286 | Flash type analog to digital converting method and circuit | Oct 16, 2003 | Issued |
Array
(
[id] => 1019284
[patent_doc_number] => 06891494
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-05-10
[patent_title] => 'Layout method of a comparator array for flash type analog to digital converting circuit'
[patent_app_type] => utility
[patent_app_number] => 10/687084
[patent_app_country] => US
[patent_app_date] => 2003-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7153
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/891/06891494.pdf
[firstpage_image] =>[orig_patent_app_number] => 10687084
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/687084 | Layout method of a comparator array for flash type analog to digital converting circuit | Oct 15, 2003 | Issued |
Array
(
[id] => 1109992
[patent_doc_number] => 06809674
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-10-26
[patent_title] => 'Analog-to-digital converters'
[patent_app_type] => B1
[patent_app_number] => 10/687468
[patent_app_country] => US
[patent_app_date] => 2003-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 3284
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/809/06809674.pdf
[firstpage_image] =>[orig_patent_app_number] => 10687468
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/687468 | Analog-to-digital converters | Oct 14, 2003 | Issued |
Array
(
[id] => 976605
[patent_doc_number] => 06933862
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-23
[patent_title] => 'Power consumption stabilization system and method'
[patent_app_type] => utility
[patent_app_number] => 10/684992
[patent_app_country] => US
[patent_app_date] => 2003-10-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3136
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/933/06933862.pdf
[firstpage_image] =>[orig_patent_app_number] => 10684992
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/684992 | Power consumption stabilization system and method | Oct 13, 2003 | Issued |
Array
(
[id] => 7223046
[patent_doc_number] => 20050078015
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-04-14
[patent_title] => 'Encoding system'
[patent_app_type] => utility
[patent_app_number] => 10/683817
[patent_app_country] => US
[patent_app_date] => 2003-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7560
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0078/20050078015.pdf
[firstpage_image] =>[orig_patent_app_number] => 10683817
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/683817 | Encoding system | Oct 9, 2003 | Issued |
Array
(
[id] => 7319354
[patent_doc_number] => 20040135565
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-15
[patent_title] => 'Microprocessor controlled boost converter'
[patent_app_type] => new
[patent_app_number] => 10/682106
[patent_app_country] => US
[patent_app_date] => 2003-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4403
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0135/20040135565.pdf
[firstpage_image] =>[orig_patent_app_number] => 10682106
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/682106 | Microprocessor controlled boost converter | Oct 8, 2003 | Abandoned |
Array
(
[id] => 5910018
[patent_doc_number] => 20060125669
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-15
[patent_title] => 'System and method for digital compensation of digital to analog and analog to digital converters'
[patent_app_type] => utility
[patent_app_number] => 10/528682
[patent_app_country] => US
[patent_app_date] => 2003-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 6094
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0125/20060125669.pdf
[firstpage_image] =>[orig_patent_app_number] => 10528682
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/528682 | System and method for digital compensation of digital to analog and analog to digital converters | Sep 23, 2003 | Issued |
Array
(
[id] => 1032115
[patent_doc_number] => 06879273
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-12
[patent_title] => 'Oversampling in analog/digital and digital/analog converters'
[patent_app_type] => utility
[patent_app_number] => 10/669280
[patent_app_country] => US
[patent_app_date] => 2003-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2318
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/879/06879273.pdf
[firstpage_image] =>[orig_patent_app_number] => 10669280
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/669280 | Oversampling in analog/digital and digital/analog converters | Sep 22, 2003 | Issued |
Array
(
[id] => 7008905
[patent_doc_number] => 20050062621
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-24
[patent_title] => '5B/6B-T, 3B/4B-T AND PARTITIONED 8B/10B-T AND 10B/12B TRANSMISSION CODES, AND THEIR IMPLEMENTATION FOR HIGH OPERATING RATES'
[patent_app_type] => utility
[patent_app_number] => 10/666285
[patent_app_country] => US
[patent_app_date] => 2003-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 33
[patent_no_of_words] => 14774
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0062/20050062621.pdf
[firstpage_image] =>[orig_patent_app_number] => 10666285
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/666285 | 5B/6B-T, 3B/4B-T and partitioned 8B/10B-T and 10B/12B transmission codes, and their implementation for high operating rates | Sep 18, 2003 | Issued |
Array
(
[id] => 1009984
[patent_doc_number] => 06900749
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-05-31
[patent_title] => 'Analog-to-digital conversion circuit'
[patent_app_type] => utility
[patent_app_number] => 10/663984
[patent_app_country] => US
[patent_app_date] => 2003-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 42
[patent_no_of_words] => 28215
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/900/06900749.pdf
[firstpage_image] =>[orig_patent_app_number] => 10663984
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/663984 | Analog-to-digital conversion circuit | Sep 16, 2003 | Issued |
| 10/662788 | METHODS FOR OUTPUT EDGE-BALANCING IN PULSE WIDTH MODULATION SYSTEMS AND DATA CONVERTERS USING THE SAME | Sep 14, 2003 | Abandoned |
Array
(
[id] => 803861
[patent_doc_number] => 07423566
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-09-09
[patent_title] => 'Sigma-delta modulator using a passive filter'
[patent_app_type] => utility
[patent_app_number] => 10/661287
[patent_app_country] => US
[patent_app_date] => 2003-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2788
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/423/07423566.pdf
[firstpage_image] =>[orig_patent_app_number] => 10661287
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/661287 | Sigma-delta modulator using a passive filter | Sep 11, 2003 | Issued |
Array
(
[id] => 7082132
[patent_doc_number] => 20050047512
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-03-03
[patent_title] => 'System and method using self-synchronized scrambling for reducing coherent interference'
[patent_app_type] => utility
[patent_app_number] => 10/650862
[patent_app_country] => US
[patent_app_date] => 2003-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2994
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0047/20050047512.pdf
[firstpage_image] =>[orig_patent_app_number] => 10650862
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/650862 | System and method using self-synchronized scrambling for reducing coherent interference | Aug 27, 2003 | Abandoned |
Array
(
[id] => 7619638
[patent_doc_number] => 06943548
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-09-13
[patent_title] => 'Adaptive dynamic range receiver for MRI'
[patent_app_type] => utility
[patent_app_number] => 10/646401
[patent_app_country] => US
[patent_app_date] => 2003-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 7342
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/943/06943548.pdf
[firstpage_image] =>[orig_patent_app_number] => 10646401
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/646401 | Adaptive dynamic range receiver for MRI | Aug 21, 2003 | Issued |
Array
(
[id] => 1032107
[patent_doc_number] => 06879270
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2005-04-12
[patent_title] => 'Data compression in multiprocessor computers'
[patent_app_type] => utility
[patent_app_number] => 10/644282
[patent_app_country] => US
[patent_app_date] => 2003-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5237
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/879/06879270.pdf
[firstpage_image] =>[orig_patent_app_number] => 10644282
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/644282 | Data compression in multiprocessor computers | Aug 19, 2003 | Issued |
Array
(
[id] => 7310607
[patent_doc_number] => 20040032358
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-02-19
[patent_title] => 'Interleaving AD conversion type waveform digitizer'
[patent_app_type] => new
[patent_app_number] => 10/643484
[patent_app_country] => US
[patent_app_date] => 2003-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 8421
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0032/20040032358.pdf
[firstpage_image] =>[orig_patent_app_number] => 10643484
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/643484 | Interleaving AD conversion type waveform digitizer | Aug 18, 2003 | Issued |
Array
(
[id] => 1006540
[patent_doc_number] => 06906649
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-06-14
[patent_title] => 'Dithering module with diplexer'
[patent_app_type] => utility
[patent_app_number] => 10/635263
[patent_app_country] => US
[patent_app_date] => 2003-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4583
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/906/06906649.pdf
[firstpage_image] =>[orig_patent_app_number] => 10635263
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/635263 | Dithering module with diplexer | Aug 5, 2003 | Issued |