
Robert R. Raevis
Examiner (ID: 9425, Phone: (571)272-2204 , Office: P/2856 )
| Most Active Art Unit | 2856 |
| Art Unit(s) | 2855, 3621, 2502, 2212, 2856, 2605, 2607, 2861 |
| Total Applications | 6011 |
| Issued Applications | 4922 |
| Pending Applications | 293 |
| Abandoned Applications | 846 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1384485
[patent_doc_number] => 06563447
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-05-13
[patent_title] => 'Non-linear bulk capacitance bootstrapped current switch'
[patent_app_type] => B1
[patent_app_number] => 10/041984
[patent_app_country] => US
[patent_app_date] => 2002-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 2790
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/563/06563447.pdf
[firstpage_image] =>[orig_patent_app_number] => 10041984
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/041984 | Non-linear bulk capacitance bootstrapped current switch | Jan 9, 2002 | Issued |
Array
(
[id] => 1391468
[patent_doc_number] => 06556153
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-29
[patent_title] => 'System and method for improving encoder resolution'
[patent_app_type] => B1
[patent_app_number] => 10/042879
[patent_app_country] => US
[patent_app_date] => 2002-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 10209
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/556/06556153.pdf
[firstpage_image] =>[orig_patent_app_number] => 10042879
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/042879 | System and method for improving encoder resolution | Jan 8, 2002 | Issued |
Array
(
[id] => 1368186
[patent_doc_number] => 06573847
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-06-03
[patent_title] => 'Multi-table mapping for huffman code decoding'
[patent_app_type] => B1
[patent_app_number] => 10/042778
[patent_app_country] => US
[patent_app_date] => 2002-01-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 1926
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/573/06573847.pdf
[firstpage_image] =>[orig_patent_app_number] => 10042778
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/042778 | Multi-table mapping for huffman code decoding | Jan 7, 2002 | Issued |
Array
(
[id] => 1401477
[patent_doc_number] => 06549157
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-15
[patent_title] => 'Digital-to-analog converting device and method used in home networking system with compensation mechanism to reduce clock jitter'
[patent_app_type] => B1
[patent_app_number] => 10/020183
[patent_app_country] => US
[patent_app_date] => 2001-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3068
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/549/06549157.pdf
[firstpage_image] =>[orig_patent_app_number] => 10020183
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/020183 | Digital-to-analog converting device and method used in home networking system with compensation mechanism to reduce clock jitter | Dec 17, 2001 | Issued |
Array
(
[id] => 6667182
[patent_doc_number] => 20030112165
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-06-19
[patent_title] => 'HIGH PRECISION, HIGH-SPEED SIGNAL CAPTURE'
[patent_app_type] => new
[patent_app_number] => 10/016983
[patent_app_country] => US
[patent_app_date] => 2001-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1970
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0112/20030112165.pdf
[firstpage_image] =>[orig_patent_app_number] => 10016983
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/016983 | High precision, high-speed signal capture | Dec 13, 2001 | Issued |
Array
(
[id] => 1304036
[patent_doc_number] => 06624769
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-09-23
[patent_title] => 'Apparatus, and associated method, for communicating content in a bandwidth-constrained communication system'
[patent_app_type] => B2
[patent_app_number] => 10/007088
[patent_app_country] => US
[patent_app_date] => 2001-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 7048
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 244
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/624/06624769.pdf
[firstpage_image] =>[orig_patent_app_number] => 10007088
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/007088 | Apparatus, and associated method, for communicating content in a bandwidth-constrained communication system | Dec 5, 2001 | Issued |
Array
(
[id] => 7644960
[patent_doc_number] => 06473013
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-29
[patent_title] => 'Parallel processing analog and digital converter'
[patent_app_type] => B1
[patent_app_number] => 09/997563
[patent_app_country] => US
[patent_app_date] => 2001-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 12
[patent_no_of_words] => 10856
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 19
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/473/06473013.pdf
[firstpage_image] =>[orig_patent_app_number] => 09997563
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/997563 | Parallel processing analog and digital converter | Nov 28, 2001 | Issued |
Array
(
[id] => 6764408
[patent_doc_number] => 20030098806
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-29
[patent_title] => 'Rejecting interference for simultaneous received signals'
[patent_app_type] => new
[patent_app_number] => 09/996176
[patent_app_country] => US
[patent_app_date] => 2001-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2228
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0098/20030098806.pdf
[firstpage_image] =>[orig_patent_app_number] => 09996176
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/996176 | Rejecting interference for simultaneous received signals | Nov 26, 2001 | Abandoned |
Array
(
[id] => 1408616
[patent_doc_number] => 06542099
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-01
[patent_title] => 'Digital to analog interface with equalized total signal delay and method of making it'
[patent_app_type] => B1
[patent_app_number] => 09/990985
[patent_app_country] => US
[patent_app_date] => 2001-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 2982
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/542/06542099.pdf
[firstpage_image] =>[orig_patent_app_number] => 09990985
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/990985 | Digital to analog interface with equalized total signal delay and method of making it | Nov 20, 2001 | Issued |
Array
(
[id] => 6799834
[patent_doc_number] => 20030094998
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-22
[patent_title] => 'Calibrated current source'
[patent_app_type] => new
[patent_app_number] => 09/990983
[patent_app_country] => US
[patent_app_date] => 2001-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2357
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0094/20030094998.pdf
[firstpage_image] =>[orig_patent_app_number] => 09990983
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/990983 | Calibrated current source | Nov 20, 2001 | Issued |
Array
(
[id] => 1301616
[patent_doc_number] => 06628219
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-09-30
[patent_title] => 'Reducing jitter in mixed-signal integrated circuit devices'
[patent_app_type] => B2
[patent_app_number] => 09/987279
[patent_app_country] => US
[patent_app_date] => 2001-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 10881
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/628/06628219.pdf
[firstpage_image] =>[orig_patent_app_number] => 09987279
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/987279 | Reducing jitter in mixed-signal integrated circuit devices | Nov 13, 2001 | Issued |
Array
(
[id] => 6859389
[patent_doc_number] => 20030090397
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-05-15
[patent_title] => 'Data compression/decompression system'
[patent_app_type] => new
[patent_app_number] => 09/992970
[patent_app_country] => US
[patent_app_date] => 2001-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 6599
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0090/20030090397.pdf
[firstpage_image] =>[orig_patent_app_number] => 09992970
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/992970 | Data compression/decompression system | Nov 13, 2001 | Issued |
Array
(
[id] => 696908
[patent_doc_number] => 07071861
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-07-04
[patent_title] => 'Apparatus and method for transmitting a digitized signal, and a data source and data sink to implement the method'
[patent_app_type] => utility
[patent_app_number] => 10/007677
[patent_app_country] => US
[patent_app_date] => 2001-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 2742
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/071/07071861.pdf
[firstpage_image] =>[orig_patent_app_number] => 10007677
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/007677 | Apparatus and method for transmitting a digitized signal, and a data source and data sink to implement the method | Nov 12, 2001 | Issued |
Array
(
[id] => 7646775
[patent_doc_number] => 06476743
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-11-05
[patent_title] => 'Magnetic stripe reader'
[patent_app_type] => B1
[patent_app_number] => 09/959884
[patent_app_country] => US
[patent_app_date] => 2001-11-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 10429
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 9
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/476/06476743.pdf
[firstpage_image] =>[orig_patent_app_number] => 09959884
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/959884 | Magnetic stripe reader | Nov 8, 2001 | Issued |
Array
(
[id] => 1332576
[patent_doc_number] => 06600439
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-07-29
[patent_title] => 'Reference voltage circuit for differential analog-to-digital converter'
[patent_app_type] => B1
[patent_app_number] => 10/010685
[patent_app_country] => US
[patent_app_date] => 2001-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2330
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/600/06600439.pdf
[firstpage_image] =>[orig_patent_app_number] => 10010685
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/010685 | Reference voltage circuit for differential analog-to-digital converter | Nov 7, 2001 | Issued |
Array
(
[id] => 1415158
[patent_doc_number] => 06535154
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-18
[patent_title] => 'Enhanced noise-shaped quasi-dynamic-element-matching technique'
[patent_app_type] => B1
[patent_app_number] => 10/008486
[patent_app_country] => US
[patent_app_date] => 2001-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 7773
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/535/06535154.pdf
[firstpage_image] =>[orig_patent_app_number] => 10008486
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/008486 | Enhanced noise-shaped quasi-dynamic-element-matching technique | Nov 4, 2001 | Issued |
Array
(
[id] => 982877
[patent_doc_number] => 06927721
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-08-09
[patent_title] => 'Low power A/D converter'
[patent_app_type] => utility
[patent_app_number] => 10/011948
[patent_app_country] => US
[patent_app_date] => 2001-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3625
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/927/06927721.pdf
[firstpage_image] =>[orig_patent_app_number] => 10011948
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/011948 | Low power A/D converter | Nov 4, 2001 | Issued |
Array
(
[id] => 6301990
[patent_doc_number] => 20020093446
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-18
[patent_title] => 'PWM-based measurement interface for a micro-machined electrostatic actuator'
[patent_app_type] => new
[patent_app_number] => 10/012688
[patent_app_country] => US
[patent_app_date] => 2001-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1833
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0093/20020093446.pdf
[firstpage_image] =>[orig_patent_app_number] => 10012688
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/012688 | PWM-based measurement interface for a micro-machined electrostatic actuator | Oct 29, 2001 | Issued |
Array
(
[id] => 5983014
[patent_doc_number] => 20020097173
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-25
[patent_title] => 'Code converter for coding and decoding digital data'
[patent_app_type] => new
[patent_app_number] => 09/984478
[patent_app_country] => US
[patent_app_date] => 2001-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 40
[patent_no_of_words] => 16807
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20020097173.pdf
[firstpage_image] =>[orig_patent_app_number] => 09984478
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/984478 | Code converter for coding and decoding digital data | Oct 29, 2001 | Abandoned |
Array
(
[id] => 1426814
[patent_doc_number] => 06515612
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-02-04
[patent_title] => 'Method and system to reduce signal-dependent charge drawn from reference voltage in switched capacitor circuits'
[patent_app_type] => B1
[patent_app_number] => 10/001794
[patent_app_country] => US
[patent_app_date] => 2001-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4573
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/515/06515612.pdf
[firstpage_image] =>[orig_patent_app_number] => 10001794
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/001794 | Method and system to reduce signal-dependent charge drawn from reference voltage in switched capacitor circuits | Oct 22, 2001 | Issued |