Search

Robert R. Raevis

Examiner (ID: 9425, Phone: (571)272-2204 , Office: P/2856 )

Most Active Art Unit
2856
Art Unit(s)
2855, 3621, 2502, 2212, 2856, 2605, 2607, 2861
Total Applications
6011
Issued Applications
4922
Pending Applications
293
Abandoned Applications
846

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1422627 [patent_doc_number] => 06525681 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-02-25 [patent_title] => 'DC compensation method and apparatus' [patent_app_type] => B2 [patent_app_number] => 09/820475 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3918 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/525/06525681.pdf [firstpage_image] =>[orig_patent_app_number] => 09820475 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/820475
DC compensation method and apparatus Mar 28, 2001 Issued
Array ( [id] => 6895446 [patent_doc_number] => 20010026236 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-04 [patent_title] => 'Digital-to-analog converter' [patent_app_type] => new [patent_app_number] => 09/821285 [patent_app_country] => US [patent_app_date] => 2001-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5244 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20010026236.pdf [firstpage_image] =>[orig_patent_app_number] => 09821285 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/821285
Adjustable digital-to-analog converter Mar 28, 2001 Issued
Array ( [id] => 6884482 [patent_doc_number] => 20010038642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'System and method for performing scalable embedded parallel data decompression' [patent_app_type] => new [patent_app_number] => 09/821785 [patent_app_country] => US [patent_app_date] => 2001-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 67 [patent_figures_cnt] => 67 [patent_no_of_words] => 56249 [patent_no_of_claims] => 220 [patent_no_of_ind_claims] => 47 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20010038642.pdf [firstpage_image] =>[orig_patent_app_number] => 09821785 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/821785
System and method for performing scalable embedded parallel data decompression Mar 27, 2001 Issued
Array ( [id] => 1562964 [patent_doc_number] => 06437717 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Two stage analog-to-digital conversion with second stage offset correction' [patent_app_type] => B1 [patent_app_number] => 09/787185 [patent_app_country] => US [patent_app_date] => 2001-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 2606 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/437/06437717.pdf [firstpage_image] =>[orig_patent_app_number] => 09787185 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/787185
Two stage analog-to-digital conversion with second stage offset correction Mar 14, 2001 Issued
Array ( [id] => 6092952 [patent_doc_number] => 20020050941 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-02 [patent_title] => 'A/D converter circuit' [patent_app_type] => new [patent_app_number] => 09/799079 [patent_app_country] => US [patent_app_date] => 2001-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5873 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20020050941.pdf [firstpage_image] =>[orig_patent_app_number] => 09799079 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/799079
A/D converter circuit Mar 5, 2001 Issued
Array ( [id] => 1548775 [patent_doc_number] => 06445321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-09-03 [patent_title] => 'Hybrid low-pass sigma-delta modulator' [patent_app_type] => B2 [patent_app_number] => 09/801013 [patent_app_country] => US [patent_app_date] => 2001-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 6122 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445321.pdf [firstpage_image] =>[orig_patent_app_number] => 09801013 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/801013
Hybrid low-pass sigma-delta modulator Mar 5, 2001 Issued
Array ( [id] => 6879329 [patent_doc_number] => 20010030614 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'Method of converting bits of optical disk, demodulating method and apparatus' [patent_app_type] => new [patent_app_number] => 09/791280 [patent_app_country] => US [patent_app_date] => 2001-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10483 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20010030614.pdf [firstpage_image] =>[orig_patent_app_number] => 09791280 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/791280
Method of converting bits of optical disk, demodulating method and apparatus Feb 20, 2001 Issued
Array ( [id] => 1396726 [patent_doc_number] => 06552673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-04-22 [patent_title] => 'Efficient table access for reversible variable length code decoding using a hash function' [patent_app_type] => B2 [patent_app_number] => 09/788076 [patent_app_country] => US [patent_app_date] => 2001-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 6379 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/552/06552673.pdf [firstpage_image] =>[orig_patent_app_number] => 09788076 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/788076
Efficient table access for reversible variable length code decoding using a hash function Feb 15, 2001 Issued
Array ( [id] => 6879331 [patent_doc_number] => 20010030616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'Circuit system suitable for codifying NRZ type binary signals into CMI type binary signals' [patent_app_type] => new [patent_app_number] => 09/764584 [patent_app_country] => US [patent_app_date] => 2001-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3392 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20010030616.pdf [firstpage_image] =>[orig_patent_app_number] => 09764584 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/764584
Circuit system suitable for codifying NRZ type binary signals into CMI type binary signals Jan 16, 2001 Issued
Array ( [id] => 1372577 [patent_doc_number] => 06570518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-27 [patent_title] => 'Multiple stage delta sigma modulator' [patent_app_type] => B2 [patent_app_number] => 09/753581 [patent_app_country] => US [patent_app_date] => 2001-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2864 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/570/06570518.pdf [firstpage_image] =>[orig_patent_app_number] => 09753581 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/753581
Multiple stage delta sigma modulator Jan 3, 2001 Issued
Array ( [id] => 6581320 [patent_doc_number] => 20020084928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-07-04 [patent_title] => 'Method and apparatus for time multiplexing of thermal sensor' [patent_app_type] => new [patent_app_number] => 09/752079 [patent_app_country] => US [patent_app_date] => 2000-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3546 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0084/20020084928.pdf [firstpage_image] =>[orig_patent_app_number] => 09752079 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/752079
Method and apparatus for time multiplexing of thermal sensor Dec 28, 2000 Abandoned
Array ( [id] => 1411653 [patent_doc_number] => 06538584 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-03-25 [patent_title] => 'Transition reduction encoder using current and last bit sets' [patent_app_type] => B2 [patent_app_number] => 09/752883 [patent_app_country] => US [patent_app_date] => 2000-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2590 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/538/06538584.pdf [firstpage_image] =>[orig_patent_app_number] => 09752883 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/752883
Transition reduction encoder using current and last bit sets Dec 27, 2000 Issued
Array ( [id] => 1598247 [patent_doc_number] => 06384751 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Data compression/decompression circuit and method' [patent_app_type] => B1 [patent_app_number] => 09/745981 [patent_app_country] => US [patent_app_date] => 2000-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 6827 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384751.pdf [firstpage_image] =>[orig_patent_app_number] => 09745981 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/745981
Data compression/decompression circuit and method Dec 21, 2000 Issued
Array ( [id] => 5886517 [patent_doc_number] => 20020011943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-01-31 [patent_title] => 'Processing circuit and method for variable-length coding and decoding' [patent_app_type] => new [patent_app_number] => 09/750383 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 11689 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20020011943.pdf [firstpage_image] =>[orig_patent_app_number] => 09750383 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/750383
Processing circuit and method for variable-length coding and decoding Dec 20, 2000 Issued
Array ( [id] => 1456601 [patent_doc_number] => 06462688 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'Direct drive programmable high speed power digital-to-analog converter' [patent_app_type] => B1 [patent_app_number] => 09/737474 [patent_app_country] => US [patent_app_date] => 2000-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 20 [patent_no_of_words] => 3719 [patent_no_of_claims] => 73 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/462/06462688.pdf [firstpage_image] =>[orig_patent_app_number] => 09737474 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/737474
Direct drive programmable high speed power digital-to-analog converter Dec 17, 2000 Issued
Array ( [id] => 1510471 [patent_doc_number] => 06441768 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-08-27 [patent_title] => 'High speed encoder and method thereof' [patent_app_type] => B2 [patent_app_number] => 09/731881 [patent_app_country] => US [patent_app_date] => 2000-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2450 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/441/06441768.pdf [firstpage_image] =>[orig_patent_app_number] => 09731881 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/731881
High speed encoder and method thereof Dec 7, 2000 Issued
Array ( [id] => 6764407 [patent_doc_number] => 20030098805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-29 [patent_title] => 'Input level adjust system and method' [patent_app_type] => new [patent_app_number] => 09/726982 [patent_app_country] => US [patent_app_date] => 2000-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 152 [patent_figures_cnt] => 152 [patent_no_of_words] => 57873 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20030098805.pdf [firstpage_image] =>[orig_patent_app_number] => 09726982 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/726982
Input level adjust system and method Nov 28, 2000 Issued
Array ( [id] => 1426395 [patent_doc_number] => 06507298 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-14 [patent_title] => 'Method for selecting, prioritizing, and A/D conversion of analog signals, and A/D converter configuration that prioritizes and selects signals' [patent_app_type] => B1 [patent_app_number] => 09/708280 [patent_app_country] => US [patent_app_date] => 2000-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5509 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/507/06507298.pdf [firstpage_image] =>[orig_patent_app_number] => 09708280 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/708280
Method for selecting, prioritizing, and A/D conversion of analog signals, and A/D converter configuration that prioritizes and selects signals Nov 7, 2000 Issued
Array ( [id] => 1015521 [patent_doc_number] => 06894630 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-17 [patent_title] => 'Enhanced direct digitizing array arrangement' [patent_app_type] => utility [patent_app_number] => 10/129286 [patent_app_country] => US [patent_app_date] => 2000-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6532 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/894/06894630.pdf [firstpage_image] =>[orig_patent_app_number] => 10129286 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/129286
Enhanced direct digitizing array arrangement Nov 1, 2000 Issued
Array ( [id] => 1384327 [patent_doc_number] => 06563439 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-13 [patent_title] => 'Method of performing Huffman decoding' [patent_app_type] => B1 [patent_app_number] => 09/704380 [patent_app_country] => US [patent_app_date] => 2000-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3043 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/563/06563439.pdf [firstpage_image] =>[orig_patent_app_number] => 09704380 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/704380
Method of performing Huffman decoding Oct 30, 2000 Issued
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