Search

Robert R. Raevis

Examiner (ID: 9425, Phone: (571)272-2204 , Office: P/2856 )

Most Active Art Unit
2856
Art Unit(s)
2855, 3621, 2502, 2212, 2856, 2605, 2607, 2861
Total Applications
6011
Issued Applications
4922
Pending Applications
293
Abandoned Applications
846

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1506248 [patent_doc_number] => 06466146 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Hybrid low-pass sigma-delta modulator' [patent_app_type] => B1 [patent_app_number] => 09/703501 [patent_app_country] => US [patent_app_date] => 2000-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 20 [patent_no_of_words] => 5767 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/466/06466146.pdf [firstpage_image] =>[orig_patent_app_number] => 09703501 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/703501
Hybrid low-pass sigma-delta modulator Oct 30, 2000 Issued
Array ( [id] => 1355429 [patent_doc_number] => 06583742 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-24 [patent_title] => 'Digital to analogue converter with dynamic element matching' [patent_app_type] => B1 [patent_app_number] => 09/622178 [patent_app_country] => US [patent_app_date] => 2000-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 5169 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/583/06583742.pdf [firstpage_image] =>[orig_patent_app_number] => 09622178 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/622178
Digital to analogue converter with dynamic element matching Oct 24, 2000 Issued
Array ( [id] => 1581357 [patent_doc_number] => 06448914 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Integrated circuit for conditioning and conversion of bi-directional discrete and analog signals' [patent_app_type] => B1 [patent_app_number] => 09/694881 [patent_app_country] => US [patent_app_date] => 2000-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3153 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 311 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/448/06448914.pdf [firstpage_image] =>[orig_patent_app_number] => 09694881 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/694881
Integrated circuit for conditioning and conversion of bi-directional discrete and analog signals Oct 23, 2000 Issued
Array ( [id] => 1441604 [patent_doc_number] => 06496124 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'System and method for compensating for codec DC offset through a DC blocking channel and modem incorporating the same' [patent_app_type] => B1 [patent_app_number] => 09/695671 [patent_app_country] => US [patent_app_date] => 2000-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2793 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496124.pdf [firstpage_image] =>[orig_patent_app_number] => 09695671 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/695671
System and method for compensating for codec DC offset through a DC blocking channel and modem incorporating the same Oct 23, 2000 Issued
Array ( [id] => 791074 [patent_doc_number] => 06985099 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-01-10 [patent_title] => 'Automatic gain control with digital filtering for radio-frequency communications systems' [patent_app_type] => utility [patent_app_number] => 09/693799 [patent_app_country] => US [patent_app_date] => 2000-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2923 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/985/06985099.pdf [firstpage_image] =>[orig_patent_app_number] => 09693799 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/693799
Automatic gain control with digital filtering for radio-frequency communications systems Oct 19, 2000 Issued
Array ( [id] => 1472519 [patent_doc_number] => 06407691 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Providing power, clock, and control signals as a single combined signal across an isolation barrier in an ADC' [patent_app_type] => B1 [patent_app_number] => 09/690981 [patent_app_country] => US [patent_app_date] => 2000-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2442 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/407/06407691.pdf [firstpage_image] =>[orig_patent_app_number] => 09690981 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/690981
Providing power, clock, and control signals as a single combined signal across an isolation barrier in an ADC Oct 17, 2000 Issued
Array ( [id] => 1498315 [patent_doc_number] => 06404374 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Comparator circuit for analog-to-digital converter' [patent_app_type] => B1 [patent_app_number] => 09/689674 [patent_app_country] => US [patent_app_date] => 2000-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2892 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404374.pdf [firstpage_image] =>[orig_patent_app_number] => 09689674 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/689674
Comparator circuit for analog-to-digital converter Oct 12, 2000 Issued
Array ( [id] => 1498312 [patent_doc_number] => 06404373 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Comparator circuit for analog-to-digital converter' [patent_app_type] => B1 [patent_app_number] => 09/689673 [patent_app_country] => US [patent_app_date] => 2000-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2627 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/404/06404373.pdf [firstpage_image] =>[orig_patent_app_number] => 09689673 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/689673
Comparator circuit for analog-to-digital converter Oct 12, 2000 Issued
Array ( [id] => 1525268 [patent_doc_number] => 06353399 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-05 [patent_title] => 'Robust encoding scheme for a shift motor encoder assembly and a system using the same' [patent_app_type] => B1 [patent_app_number] => 09/686385 [patent_app_country] => US [patent_app_date] => 2000-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4758 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/353/06353399.pdf [firstpage_image] =>[orig_patent_app_number] => 09686385 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/686385
Robust encoding scheme for a shift motor encoder assembly and a system using the same Oct 10, 2000 Issued
Array ( [id] => 1453207 [patent_doc_number] => 06456214 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-24 [patent_title] => 'High-speed comparator utilizing resonant tunneling diodes and associated method' [patent_app_type] => B1 [patent_app_number] => 09/670765 [patent_app_country] => US [patent_app_date] => 2000-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5141 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/456/06456214.pdf [firstpage_image] =>[orig_patent_app_number] => 09670765 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/670765
High-speed comparator utilizing resonant tunneling diodes and associated method Sep 26, 2000 Issued
Array ( [id] => 1506242 [patent_doc_number] => 06466142 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Method and apparatus for generating families of code signals using multi-scale shuffling' [patent_app_type] => B1 [patent_app_number] => 09/669872 [patent_app_country] => US [patent_app_date] => 2000-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 3433 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/466/06466142.pdf [firstpage_image] =>[orig_patent_app_number] => 09669872 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/669872
Method and apparatus for generating families of code signals using multi-scale shuffling Sep 24, 2000 Issued
Array ( [id] => 1562989 [patent_doc_number] => 06437723 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Signal processing circuit and semiconductor integrated circuit converting AC signal using two voltage reference values' [patent_app_type] => B1 [patent_app_number] => 09/665678 [patent_app_country] => US [patent_app_date] => 2000-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9757 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/437/06437723.pdf [firstpage_image] =>[orig_patent_app_number] => 09665678 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/665678
Signal processing circuit and semiconductor integrated circuit converting AC signal using two voltage reference values Sep 19, 2000 Issued
Array ( [id] => 1411714 [patent_doc_number] => 06538588 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-25 [patent_title] => 'Multi-sampling - analog-to-digital converter' [patent_app_type] => B1 [patent_app_number] => 09/664989 [patent_app_country] => US [patent_app_date] => 2000-09-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 34 [patent_no_of_words] => 15112 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/538/06538588.pdf [firstpage_image] =>[orig_patent_app_number] => 09664989 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/664989
Multi-sampling - analog-to-digital converter Sep 17, 2000 Issued
Array ( [id] => 4391509 [patent_doc_number] => 06278391 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Method and apparatus for D.C. offset correction in digital-to-analog converters' [patent_app_type] => 1 [patent_app_number] => 9/662265 [patent_app_country] => US [patent_app_date] => 2000-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9059 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/278/06278391.pdf [firstpage_image] =>[orig_patent_app_number] => 662265 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/662265
Method and apparatus for D.C. offset correction in digital-to-analog converters Sep 13, 2000 Issued
Array ( [id] => 1462630 [patent_doc_number] => 06392570 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Method and system for decoding 8-bit/10-bit data using limited width decoders' [patent_app_type] => B1 [patent_app_number] => 09/662075 [patent_app_country] => US [patent_app_date] => 2000-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 6366 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/392/06392570.pdf [firstpage_image] =>[orig_patent_app_number] => 09662075 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/662075
Method and system for decoding 8-bit/10-bit data using limited width decoders Sep 13, 2000 Issued
Array ( [id] => 1562990 [patent_doc_number] => 06437724 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'Fully differential flash A/D converter' [patent_app_type] => B1 [patent_app_number] => 09/662274 [patent_app_country] => US [patent_app_date] => 2000-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1762 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/437/06437724.pdf [firstpage_image] =>[orig_patent_app_number] => 09662274 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/662274
Fully differential flash A/D converter Sep 13, 2000 Issued
Array ( [id] => 1495864 [patent_doc_number] => 06342850 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-29 [patent_title] => 'Summation of band-limited ADC outputs having different resolutions and rates' [patent_app_type] => B1 [patent_app_number] => 09/660180 [patent_app_country] => US [patent_app_date] => 2000-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2541 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/342/06342850.pdf [firstpage_image] =>[orig_patent_app_number] => 09660180 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/660180
Summation of band-limited ADC outputs having different resolutions and rates Sep 11, 2000 Issued
Array ( [id] => 1564086 [patent_doc_number] => 06362770 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Dual input switched capacitor gain stage' [patent_app_type] => B1 [patent_app_number] => 09/659972 [patent_app_country] => US [patent_app_date] => 2000-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 4721 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362770.pdf [firstpage_image] =>[orig_patent_app_number] => 09659972 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/659972
Dual input switched capacitor gain stage Sep 11, 2000 Issued
Array ( [id] => 1589019 [patent_doc_number] => 06359577 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Multiple digital-to-analog system with analog interpolation' [patent_app_type] => B1 [patent_app_number] => 09/657480 [patent_app_country] => US [patent_app_date] => 2000-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 3981 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/359/06359577.pdf [firstpage_image] =>[orig_patent_app_number] => 09657480 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/657480
Multiple digital-to-analog system with analog interpolation Sep 6, 2000 Issued
Array ( [id] => 4295130 [patent_doc_number] => 06268811 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Data compression method and apparatus with embedded run-length encoding' [patent_app_type] => 1 [patent_app_number] => 9/656262 [patent_app_country] => US [patent_app_date] => 2000-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7215 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/268/06268811.pdf [firstpage_image] =>[orig_patent_app_number] => 656262 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/656262
Data compression method and apparatus with embedded run-length encoding Sep 5, 2000 Issued
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