Search

Robert R. Raevis

Examiner (ID: 9425, Phone: (571)272-2204 , Office: P/2856 )

Most Active Art Unit
2856
Art Unit(s)
2855, 3621, 2502, 2212, 2856, 2605, 2607, 2861
Total Applications
6011
Issued Applications
4922
Pending Applications
293
Abandoned Applications
846

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4006968 [patent_doc_number] => 05986594 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Image compression by arithmetic coding with learning limit' [patent_app_type] => 1 [patent_app_number] => 8/925766 [patent_app_country] => US [patent_app_date] => 1997-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6696 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986594.pdf [firstpage_image] =>[orig_patent_app_number] => 925766 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/925766
Image compression by arithmetic coding with learning limit Sep 8, 1997 Issued
Array ( [id] => 3957799 [patent_doc_number] => 05955978 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'A/D converter with auto-zeroed latching comparator and method' [patent_app_type] => 1 [patent_app_number] => 8/925041 [patent_app_country] => US [patent_app_date] => 1997-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5852 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/955/05955978.pdf [firstpage_image] =>[orig_patent_app_number] => 925041 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/925041
A/D converter with auto-zeroed latching comparator and method Sep 7, 1997 Issued
Array ( [id] => 4116407 [patent_doc_number] => 06057790 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Apparatus and method for data compression/expansion using block-based coding with top flag' [patent_app_type] => 1 [patent_app_number] => 8/922676 [patent_app_country] => US [patent_app_date] => 1997-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 16742 [patent_no_of_claims] => 58 [patent_no_of_ind_claims] => 29 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057790.pdf [firstpage_image] =>[orig_patent_app_number] => 922676 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/922676
Apparatus and method for data compression/expansion using block-based coding with top flag Sep 2, 1997 Issued
Array ( [id] => 4078662 [patent_doc_number] => 06069573 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-30 [patent_title] => 'Match and match address signal prioritization in a content addressable memory encoder' [patent_app_type] => 1 [patent_app_number] => 8/920665 [patent_app_country] => US [patent_app_date] => 1997-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 28 [patent_no_of_words] => 7837 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/069/06069573.pdf [firstpage_image] =>[orig_patent_app_number] => 920665 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/920665
Match and match address signal prioritization in a content addressable memory encoder Aug 28, 1997 Issued
Array ( [id] => 3813558 [patent_doc_number] => 05854600 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-29 [patent_title] => 'Hidden side code channels' [patent_app_type] => 1 [patent_app_number] => 8/919566 [patent_app_country] => US [patent_app_date] => 1997-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 49 [patent_no_of_words] => 26478 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/854/05854600.pdf [firstpage_image] =>[orig_patent_app_number] => 919566 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/919566
Hidden side code channels Aug 28, 1997 Issued
Array ( [id] => 3948169 [patent_doc_number] => 05973627 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Variable length decoder with adaptive acceleration optimized by sub-grouping and cross-grouping the symbols having the highest probability of occurrence' [patent_app_type] => 1 [patent_app_number] => 8/919972 [patent_app_country] => US [patent_app_date] => 1997-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7662 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/973/05973627.pdf [firstpage_image] =>[orig_patent_app_number] => 919972 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/919972
Variable length decoder with adaptive acceleration optimized by sub-grouping and cross-grouping the symbols having the highest probability of occurrence Aug 27, 1997 Issued
Array ( [id] => 3929201 [patent_doc_number] => 05914678 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Triplet decoding circuit and triplet decoding method' [patent_app_type] => 1 [patent_app_number] => 8/917276 [patent_app_country] => US [patent_app_date] => 1997-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 32 [patent_no_of_words] => 10489 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/914/05914678.pdf [firstpage_image] =>[orig_patent_app_number] => 917276 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/917276
Triplet decoding circuit and triplet decoding method Aug 24, 1997 Issued
Array ( [id] => 3954464 [patent_doc_number] => 05990813 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Method and apparatus for synchronizing external data to an internal timing signal' [patent_app_type] => 1 [patent_app_number] => 8/921873 [patent_app_country] => US [patent_app_date] => 1997-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3271 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/990/05990813.pdf [firstpage_image] =>[orig_patent_app_number] => 921873 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/921873
Method and apparatus for synchronizing external data to an internal timing signal Aug 21, 1997 Issued
Array ( [id] => 3988615 [patent_doc_number] => 05949362 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-07 [patent_title] => 'Digital-to-analog converter including current cell matrix with enhanced linearity and associated methods' [patent_app_type] => 1 [patent_app_number] => 8/916569 [patent_app_country] => US [patent_app_date] => 1997-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4228 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/949/05949362.pdf [firstpage_image] =>[orig_patent_app_number] => 916569 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/916569
Digital-to-analog converter including current cell matrix with enhanced linearity and associated methods Aug 21, 1997 Issued
Array ( [id] => 4089754 [patent_doc_number] => 06054942 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'System and method for scaleable encoding and decoding of variable bit frames' [patent_app_type] => 1 [patent_app_number] => 8/911170 [patent_app_country] => US [patent_app_date] => 1997-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4106 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/054/06054942.pdf [firstpage_image] =>[orig_patent_app_number] => 911170 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/911170
System and method for scaleable encoding and decoding of variable bit frames Aug 13, 1997 Issued
Array ( [id] => 3935457 [patent_doc_number] => 05952951 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Chopper comparator and A/D converter' [patent_app_type] => 1 [patent_app_number] => 8/910762 [patent_app_country] => US [patent_app_date] => 1997-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9247 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/952/05952951.pdf [firstpage_image] =>[orig_patent_app_number] => 910762 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/910762
Chopper comparator and A/D converter Aug 12, 1997 Issued
Array ( [id] => 4116477 [patent_doc_number] => 06057795 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-02 [patent_title] => 'Power saving A/D converter' [patent_app_type] => 1 [patent_app_number] => 8/907868 [patent_app_country] => US [patent_app_date] => 1997-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2275 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/057/06057795.pdf [firstpage_image] =>[orig_patent_app_number] => 907868 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/907868
Power saving A/D converter Aug 10, 1997 Issued
Array ( [id] => 4107361 [patent_doc_number] => 06067035 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Method for monitoring the operability of an analog to digital converter configured for digitizing analog signals' [patent_app_type] => 1 [patent_app_number] => 8/905263 [patent_app_country] => US [patent_app_date] => 1997-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4902 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/067/06067035.pdf [firstpage_image] =>[orig_patent_app_number] => 905263 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/905263
Method for monitoring the operability of an analog to digital converter configured for digitizing analog signals Jul 31, 1997 Issued
Array ( [id] => 4034386 [patent_doc_number] => 05903230 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Apparatus for compressing data using a Lempel-Ziv-type algorithm' [patent_app_type] => 1 [patent_app_number] => 8/899205 [patent_app_country] => US [patent_app_date] => 1997-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 7587 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903230.pdf [firstpage_image] =>[orig_patent_app_number] => 899205 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/899205
Apparatus for compressing data using a Lempel-Ziv-type algorithm Jul 22, 1997 Issued
Array ( [id] => 4022547 [patent_doc_number] => 05880683 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Absolute digital position encoder' [patent_app_type] => 1 [patent_app_number] => 8/899407 [patent_app_country] => US [patent_app_date] => 1997-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 23 [patent_no_of_words] => 8233 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880683.pdf [firstpage_image] =>[orig_patent_app_number] => 899407 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/899407
Absolute digital position encoder Jul 22, 1997 Issued
Array ( [id] => 4059998 [patent_doc_number] => 05969657 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Digital to analog converter' [patent_app_type] => 1 [patent_app_number] => 8/898677 [patent_app_country] => US [patent_app_date] => 1997-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8215 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/969/05969657.pdf [firstpage_image] =>[orig_patent_app_number] => 898677 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/898677
Digital to analog converter Jul 21, 1997 Issued
Array ( [id] => 4016117 [patent_doc_number] => 05889483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-30 [patent_title] => 'Mute signal processing circuit for one-bit digital signal' [patent_app_type] => 1 [patent_app_number] => 8/897977 [patent_app_country] => US [patent_app_date] => 1997-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3367 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/889/05889483.pdf [firstpage_image] =>[orig_patent_app_number] => 897977 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/897977
Mute signal processing circuit for one-bit digital signal Jul 20, 1997 Issued
08/896460 IMPROVED SUCCESSIVE APPROXIMATION A/D CONVERTER Jul 17, 1997 Abandoned
Array ( [id] => 4005799 [patent_doc_number] => 05923272 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Serial bitstream code for timing-based servo' [patent_app_type] => 1 [patent_app_number] => 8/889532 [patent_app_country] => US [patent_app_date] => 1997-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4829 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923272.pdf [firstpage_image] =>[orig_patent_app_number] => 889532 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/889532
Serial bitstream code for timing-based servo Jul 7, 1997 Issued
Array ( [id] => 4001425 [patent_doc_number] => 05892472 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Processor controlled analog-to-digital converter circuit' [patent_app_type] => 1 [patent_app_number] => 8/885274 [patent_app_country] => US [patent_app_date] => 1997-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3318 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892472.pdf [firstpage_image] =>[orig_patent_app_number] => 885274 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/885274
Processor controlled analog-to-digital converter circuit Jun 29, 1997 Issued
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