Search

Robert R. Raevis

Examiner (ID: 9425, Phone: (571)272-2204 , Office: P/2856 )

Most Active Art Unit
2856
Art Unit(s)
2855, 3621, 2502, 2212, 2856, 2605, 2607, 2861
Total Applications
6011
Issued Applications
4922
Pending Applications
293
Abandoned Applications
846

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3630976 [patent_doc_number] => 05608394 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Position detecting method and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/385267 [patent_app_country] => US [patent_app_date] => 1995-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 11489 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608394.pdf [firstpage_image] =>[orig_patent_app_number] => 385267 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/385267
Position detecting method and apparatus Feb 7, 1995 Issued
Array ( [id] => 3738001 [patent_doc_number] => 05666115 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Shifter stage for variable-length digital code decoder' [patent_app_type] => 1 [patent_app_number] => 8/384560 [patent_app_country] => US [patent_app_date] => 1995-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5210 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666115.pdf [firstpage_image] =>[orig_patent_app_number] => 384560 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/384560
Shifter stage for variable-length digital code decoder Feb 5, 1995 Issued
08/381649 VARIABLE-LENGTH ENCODER AND DECODER USING SYMBOL/CODE-WORD RE-ASSOCIATION OF A CODING TABLE Jan 30, 1995 Abandoned
Array ( [id] => 3838556 [patent_doc_number] => 05760722 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-02 [patent_title] => 'Distributed quantization noise transmission zeros in cascaded sigma-delta modulators' [patent_app_type] => 1 [patent_app_number] => 8/381665 [patent_app_country] => US [patent_app_date] => 1995-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4086 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/760/05760722.pdf [firstpage_image] =>[orig_patent_app_number] => 381665 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/381665
Distributed quantization noise transmission zeros in cascaded sigma-delta modulators Jan 30, 1995 Issued
Array ( [id] => 3704058 [patent_doc_number] => 05677686 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Absolute position detection apparatus and error compensation methods therefor' [patent_app_type] => 1 [patent_app_number] => 8/379739 [patent_app_country] => US [patent_app_date] => 1995-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 7798 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/677/05677686.pdf [firstpage_image] =>[orig_patent_app_number] => 379739 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/379739
Absolute position detection apparatus and error compensation methods therefor Jan 26, 1995 Issued
08/377377 ABSOLUTE DIGITAL POSITION ENCODER Jan 24, 1995 Abandoned
Array ( [id] => 3670728 [patent_doc_number] => 05598159 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-28 [patent_title] => 'Method for the fast decoding of the output signals of sigma delta modulators' [patent_app_type] => 1 [patent_app_number] => 8/378256 [patent_app_country] => US [patent_app_date] => 1995-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 4388 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/598/05598159.pdf [firstpage_image] =>[orig_patent_app_number] => 378256 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/378256
Method for the fast decoding of the output signals of sigma delta modulators Jan 23, 1995 Issued
Array ( [id] => 3626496 [patent_doc_number] => 05642114 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-24 [patent_title] => 'Variable length code decoder using a content addressable memory with match inhibiting gate' [patent_app_type] => 1 [patent_app_number] => 8/351253 [patent_app_country] => US [patent_app_date] => 1995-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 8406 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/642/05642114.pdf [firstpage_image] =>[orig_patent_app_number] => 351253 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/351253
Variable length code decoder using a content addressable memory with match inhibiting gate Jan 23, 1995 Issued
Array ( [id] => 3459347 [patent_doc_number] => 05451950 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-19 [patent_title] => 'Method for reducing errors in switched-capacitor digital-to-analog converter systems and apparatus therefor' [patent_app_type] => 1 [patent_app_number] => 8/377443 [patent_app_country] => US [patent_app_date] => 1995-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3343 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/451/05451950.pdf [firstpage_image] =>[orig_patent_app_number] => 377443 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/377443
Method for reducing errors in switched-capacitor digital-to-analog converter systems and apparatus therefor Jan 23, 1995 Issued
Array ( [id] => 3694207 [patent_doc_number] => 05644308 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Algorithmic analog-to-digital converter having redundancy and digital calibration' [patent_app_type] => 1 [patent_app_number] => 8/372954 [patent_app_country] => US [patent_app_date] => 1995-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 23 [patent_no_of_words] => 15391 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644308.pdf [firstpage_image] =>[orig_patent_app_number] => 372954 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/372954
Algorithmic analog-to-digital converter having redundancy and digital calibration Jan 16, 1995 Issued
Array ( [id] => 3527230 [patent_doc_number] => 05489903 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-06 [patent_title] => 'Digital to analog conversion using non-uniform sample rates' [patent_app_type] => 1 [patent_app_number] => 8/373864 [patent_app_country] => US [patent_app_date] => 1995-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6542 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/489/05489903.pdf [firstpage_image] =>[orig_patent_app_number] => 373864 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/373864
Digital to analog conversion using non-uniform sample rates Jan 16, 1995 Issued
Array ( [id] => 3877734 [patent_doc_number] => 05838270 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-17 [patent_title] => 'Second order and cascaded 2-1 oversampled modulators with improved dynamic range' [patent_app_type] => 1 [patent_app_number] => 8/371635 [patent_app_country] => US [patent_app_date] => 1995-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1959 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/838/05838270.pdf [firstpage_image] =>[orig_patent_app_number] => 371635 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/371635
Second order and cascaded 2-1 oversampled modulators with improved dynamic range Jan 11, 1995 Issued
Array ( [id] => 3526575 [patent_doc_number] => 05530444 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Differential amplifiers which can form a residue amplifier in sub-ranging A/D converters' [patent_app_type] => 1 [patent_app_number] => 8/368862 [patent_app_country] => US [patent_app_date] => 1995-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 7068 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530444.pdf [firstpage_image] =>[orig_patent_app_number] => 368862 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/368862
Differential amplifiers which can form a residue amplifier in sub-ranging A/D converters Jan 4, 1995 Issued
Array ( [id] => 3597181 [patent_doc_number] => 05568146 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Digital/analog converter' [patent_app_type] => 1 [patent_app_number] => 8/368445 [patent_app_country] => US [patent_app_date] => 1995-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3282 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/568/05568146.pdf [firstpage_image] =>[orig_patent_app_number] => 368445 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/368445
Digital/analog converter Jan 3, 1995 Issued
08/358879 HUFFMAN CODING /DECODING USING AN INTERMEDIATE CODE INTERMEDIATE Dec 18, 1994 Abandoned
Array ( [id] => 3640668 [patent_doc_number] => 05631648 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-20 [patent_title] => 'Signal compression or expansion circuit for mobile communication' [patent_app_type] => 1 [patent_app_number] => 8/353615 [patent_app_country] => US [patent_app_date] => 1994-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3096 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/631/05631648.pdf [firstpage_image] =>[orig_patent_app_number] => 353615 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/353615
Signal compression or expansion circuit for mobile communication Dec 11, 1994 Issued
Array ( [id] => 3495551 [patent_doc_number] => 05471206 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-28 [patent_title] => 'Method and apparatus for parallel decoding and encoding of data' [patent_app_type] => 1 [patent_app_number] => 8/350321 [patent_app_country] => US [patent_app_date] => 1994-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 28 [patent_no_of_words] => 15222 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/471/05471206.pdf [firstpage_image] =>[orig_patent_app_number] => 350321 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/350321
Method and apparatus for parallel decoding and encoding of data Dec 4, 1994 Issued
Array ( [id] => 3694278 [patent_doc_number] => 05644312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Rom encoder circuit for flash ADC\'S with transistor sizing to prevent sparkle errors' [patent_app_type] => 1 [patent_app_number] => 8/346753 [patent_app_country] => US [patent_app_date] => 1994-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 4002 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644312.pdf [firstpage_image] =>[orig_patent_app_number] => 346753 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/346753
Rom encoder circuit for flash ADC'S with transistor sizing to prevent sparkle errors Nov 29, 1994 Issued
Array ( [id] => 3629913 [patent_doc_number] => 05602552 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-11 [patent_title] => 'D/A converter capable of disabling the output' [patent_app_type] => 1 [patent_app_number] => 8/345754 [patent_app_country] => US [patent_app_date] => 1994-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5033 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/602/05602552.pdf [firstpage_image] =>[orig_patent_app_number] => 345754 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/345754
D/A converter capable of disabling the output Nov 21, 1994 Issued
Array ( [id] => 3671036 [patent_doc_number] => 05668549 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-16 [patent_title] => 'Radix 2 architecture and calibration technique for pipelined analog to digital converters' [patent_app_type] => 1 [patent_app_number] => 8/337253 [patent_app_country] => US [patent_app_date] => 1994-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 27 [patent_no_of_words] => 9344 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/668/05668549.pdf [firstpage_image] =>[orig_patent_app_number] => 337253 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/337253
Radix 2 architecture and calibration technique for pipelined analog to digital converters Nov 9, 1994 Issued
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