
Robert R. Raevis
Examiner (ID: 9425, Phone: (571)272-2204 , Office: P/2856 )
| Most Active Art Unit | 2856 |
| Art Unit(s) | 2855, 3621, 2502, 2212, 2856, 2605, 2607, 2861 |
| Total Applications | 6011 |
| Issued Applications | 4922 |
| Pending Applications | 293 |
| Abandoned Applications | 846 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3708519
[patent_doc_number] => 05646621
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-08
[patent_title] => 'Delta-sigma ADC with multi-stage decimation filter and gain compensation filter'
[patent_app_type] => 1
[patent_app_number] => 8/333535
[patent_app_country] => US
[patent_app_date] => 1994-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 61
[patent_figures_cnt] => 72
[patent_no_of_words] => 25894
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/646/05646621.pdf
[firstpage_image] =>[orig_patent_app_number] => 333535
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/333535 | Delta-sigma ADC with multi-stage decimation filter and gain compensation filter | Nov 1, 1994 | Issued |
Array
(
[id] => 3597197
[patent_doc_number] => 05568147
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'Digital-to-analog converter for reducing occupied area thereof'
[patent_app_type] => 1
[patent_app_number] => 8/334343
[patent_app_country] => US
[patent_app_date] => 1994-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 39
[patent_no_of_words] => 6298
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/568/05568147.pdf
[firstpage_image] =>[orig_patent_app_number] => 334343
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/334343 | Digital-to-analog converter for reducing occupied area thereof | Nov 1, 1994 | Issued |
Array
(
[id] => 3596291
[patent_doc_number] => 05585802
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-17
[patent_title] => 'Multi-stage digital to analog conversion circuit and method'
[patent_app_type] => 1
[patent_app_number] => 8/333460
[patent_app_country] => US
[patent_app_date] => 1994-11-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 61
[patent_figures_cnt] => 67
[patent_no_of_words] => 25335
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/585/05585802.pdf
[firstpage_image] =>[orig_patent_app_number] => 333460
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/333460 | Multi-stage digital to analog conversion circuit and method | Nov 1, 1994 | Issued |
Array
(
[id] => 3543965
[patent_doc_number] => 05495244
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-27
[patent_title] => 'Device for encoding and decoding transmission signals through adaptive selection of transforming methods'
[patent_app_type] => 1
[patent_app_number] => 8/322037
[patent_app_country] => US
[patent_app_date] => 1994-10-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2233
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/495/05495244.pdf
[firstpage_image] =>[orig_patent_app_number] => 322037
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/322037 | Device for encoding and decoding transmission signals through adaptive selection of transforming methods | Oct 11, 1994 | Issued |
Array
(
[id] => 3783641
[patent_doc_number] => 05808569
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-15
[patent_title] => 'Transmission system implementing different coding principles'
[patent_app_type] => 1
[patent_app_number] => 8/320636
[patent_app_country] => US
[patent_app_date] => 1994-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 22
[patent_no_of_words] => 6473
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/808/05808569.pdf
[firstpage_image] =>[orig_patent_app_number] => 320636
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/320636 | Transmission system implementing different coding principles | Oct 10, 1994 | Issued |
Array
(
[id] => 3629899
[patent_doc_number] => 05602551
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-11
[patent_title] => 'Analog-to-digital converter with silicon-on-insulator structure'
[patent_app_type] => 1
[patent_app_number] => 8/318541
[patent_app_country] => US
[patent_app_date] => 1994-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 29
[patent_no_of_words] => 4215
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/602/05602551.pdf
[firstpage_image] =>[orig_patent_app_number] => 318541
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/318541 | Analog-to-digital converter with silicon-on-insulator structure | Oct 4, 1994 | Issued |
| 08/316116 | METHOD AND APPARATUS FOR ENCODING AND DECODING DATA | Sep 29, 1994 | Abandoned |
Array
(
[id] => 3448967
[patent_doc_number] => 05467090
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-11-14
[patent_title] => 'Serial processing circuits with serial chaining'
[patent_app_type] => 1
[patent_app_number] => 8/314162
[patent_app_country] => US
[patent_app_date] => 1994-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 26
[patent_no_of_words] => 15237
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/467/05467090.pdf
[firstpage_image] =>[orig_patent_app_number] => 314162
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/314162 | Serial processing circuits with serial chaining | Sep 27, 1994 | Issued |
Array
(
[id] => 3425267
[patent_doc_number] => 05479165
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-26
[patent_title] => 'Two-dimensional coding apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/305743
[patent_app_country] => US
[patent_app_date] => 1994-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2001
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/479/05479165.pdf
[firstpage_image] =>[orig_patent_app_number] => 305743
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/305743 | Two-dimensional coding apparatus | Sep 13, 1994 | Issued |
Array
(
[id] => 3482225
[patent_doc_number] => 05432513
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-07-11
[patent_title] => 'Codec'
[patent_app_type] => 1
[patent_app_number] => 8/302235
[patent_app_country] => US
[patent_app_date] => 1994-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6819
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 217
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/432/05432513.pdf
[firstpage_image] =>[orig_patent_app_number] => 302235
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/302235 | Codec | Sep 7, 1994 | Issued |
Array
(
[id] => 3696050
[patent_doc_number] => 05604496
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-18
[patent_title] => 'Data processing device using data correlation'
[patent_app_type] => 1
[patent_app_number] => 8/299421
[patent_app_country] => US
[patent_app_date] => 1994-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 3975
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/604/05604496.pdf
[firstpage_image] =>[orig_patent_app_number] => 299421
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/299421 | Data processing device using data correlation | Aug 31, 1994 | Issued |
Array
(
[id] => 3654238
[patent_doc_number] => 05629701
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-13
[patent_title] => 'Cascaded Nth order (N>2) feedforward sigma-delta modulators'
[patent_app_type] => 1
[patent_app_number] => 8/256567
[patent_app_country] => US
[patent_app_date] => 1994-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 3322
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/629/05629701.pdf
[firstpage_image] =>[orig_patent_app_number] => 256567
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/256567 | Cascaded Nth order (N>2) feedforward sigma-delta modulators | Aug 10, 1994 | Issued |
Array
(
[id] => 3605029
[patent_doc_number] => 05559514
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-24
[patent_title] => 'Analog-to-digital converter with sigma-delta duty cycle encoded output'
[patent_app_type] => 1
[patent_app_number] => 8/287664
[patent_app_country] => US
[patent_app_date] => 1994-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 4130
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/559/05559514.pdf
[firstpage_image] =>[orig_patent_app_number] => 287664
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/287664 | Analog-to-digital converter with sigma-delta duty cycle encoded output | Aug 8, 1994 | Issued |
Array
(
[id] => 3511580
[patent_doc_number] => 05515046
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-07
[patent_title] => 'Method and apparatus for multiplexed oversampled analog to digital modulation'
[patent_app_type] => 1
[patent_app_number] => 8/211047
[patent_app_country] => US
[patent_app_date] => 1994-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 18
[patent_no_of_words] => 6920
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/515/05515046.pdf
[firstpage_image] =>[orig_patent_app_number] => 211047
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/211047 | Method and apparatus for multiplexed oversampled analog to digital modulation | Aug 3, 1994 | Issued |
Array
(
[id] => 3533017
[patent_doc_number] => 05541594
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-30
[patent_title] => 'Fixed quality source coder with fixed threshold'
[patent_app_type] => 1
[patent_app_number] => 8/274622
[patent_app_country] => US
[patent_app_date] => 1994-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 20
[patent_no_of_words] => 7000
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/541/05541594.pdf
[firstpage_image] =>[orig_patent_app_number] => 274622
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/274622 | Fixed quality source coder with fixed threshold | Jul 12, 1994 | Issued |
Array
(
[id] => 3592925
[patent_doc_number] => 05552784
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-03
[patent_title] => 'Distortion reduction circuit for analog to digital converter system'
[patent_app_type] => 1
[patent_app_number] => 8/268366
[patent_app_country] => US
[patent_app_date] => 1994-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 4398
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 185
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/552/05552784.pdf
[firstpage_image] =>[orig_patent_app_number] => 268366
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/268366 | Distortion reduction circuit for analog to digital converter system | Jun 29, 1994 | Issued |
Array
(
[id] => 3540155
[patent_doc_number] => 05557275
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-17
[patent_title] => 'Error-tolerant binary encoder'
[patent_app_type] => 1
[patent_app_number] => 8/269812
[patent_app_country] => US
[patent_app_date] => 1994-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 3787
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 415
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/557/05557275.pdf
[firstpage_image] =>[orig_patent_app_number] => 269812
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/269812 | Error-tolerant binary encoder | Jun 29, 1994 | Issued |
Array
(
[id] => 3630990
[patent_doc_number] => 05608395
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-04
[patent_title] => 'Simplified computer access system'
[patent_app_type] => 1
[patent_app_number] => 8/264139
[patent_app_country] => US
[patent_app_date] => 1994-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 3552
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/608/05608395.pdf
[firstpage_image] =>[orig_patent_app_number] => 264139
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/264139 | Simplified computer access system | Jun 21, 1994 | Issued |
Array
(
[id] => 3536425
[patent_doc_number] => 05583502
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-10
[patent_title] => 'A-D converter testing circuit and D-A converter testing circuit'
[patent_app_type] => 1
[patent_app_number] => 8/263429
[patent_app_country] => US
[patent_app_date] => 1994-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 29
[patent_no_of_words] => 15908
[patent_no_of_claims] => 33
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/583/05583502.pdf
[firstpage_image] =>[orig_patent_app_number] => 263429
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/263429 | A-D converter testing circuit and D-A converter testing circuit | Jun 20, 1994 | Issued |
Array
(
[id] => 3115637
[patent_doc_number] => 05408286
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-04-18
[patent_title] => 'Signal generating device with selective pattern reading'
[patent_app_type] => 1
[patent_app_number] => 8/261020
[patent_app_country] => US
[patent_app_date] => 1994-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 1891
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 16
[patent_words_short_claim] => 20
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/408/05408286.pdf
[firstpage_image] =>[orig_patent_app_number] => 261020
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/261020 | Signal generating device with selective pattern reading | Jun 15, 1994 | Issued |