Robert R. Raevis

Array ( [id] => 3077003 [patent_doc_number] => 05361066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-01 [patent_title] => 'Data processing device using data correlation' [patent_app_type] => 1 [patent_app_number] => 8/190577 [patent_app_country] => US [patent_app_date] => 1994-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 4023 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/361/05361066.pdf [firstpage_image] =>[orig_patent_app_number] => 190577 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3581909 [patent_doc_number] => 05523756 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-04 [patent_title] => 'Analog-to-digital converter with offset reduction loop' [patent_app_type] => 1 [patent_app_number] => 8/182469 [patent_app_country] => US [patent_app_date] => 1994-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1100 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/523/05523756.pdf [firstpage_image] =>[orig_patent_app_number] => 182469 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3546076 [patent_doc_number] => 05481267 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-02 [patent_title] => 'Sampling rate converter' [patent_app_type] => 1 [patent_app_number] => 8/176560 [patent_app_country] => US [patent_app_date] => 1994-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3253 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/481/05481267.pdf [firstpage_image] =>[orig_patent_app_number] => 176560 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3640627 [patent_doc_number] => 05631645 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-20 [patent_title] => 'Symbol to byte converter' [patent_app_type] => 1 [patent_app_number] => 8/175070 [patent_app_country] => US [patent_app_date] => 1993-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6430 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/631/05631645.pdf [firstpage_image] =>[orig_patent_app_number] => 175070 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3536390 [patent_doc_number] => 05583500 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-10 [patent_title] => 'Method and apparatus for parallel encoding and decoding of data' [patent_app_type] => 1 [patent_app_number] => 8/172646 [patent_app_country] => US [patent_app_date] => 1993-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 30 [patent_no_of_words] => 19658 [patent_no_of_claims] => 70 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/583/05583500.pdf [firstpage_image] =>[orig_patent_app_number] => 172646 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3555568 [patent_doc_number] => 05548288 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-20 [patent_title] => 'BiCMOS current cell and switch for digital-to-analog coverters' [patent_app_type] => 1 [patent_app_number] => 8/174165 [patent_app_country] => US [patent_app_date] => 1993-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4153 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/548/05548288.pdf [firstpage_image] =>[orig_patent_app_number] => 174165 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3497866 [patent_doc_number] => 05561425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-01 [patent_title] => 'Multiplexed delta-sigma analog-to-digital converter' [patent_app_type] => 1 [patent_app_number] => 8/167274 [patent_app_country] => US [patent_app_date] => 1993-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 2688 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/561/05561425.pdf [firstpage_image] =>[orig_patent_app_number] => 167274 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3670780 [patent_doc_number] => 05598161 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-28 [patent_title] => 'Analog-to-digital converter having reduced circuit area' [patent_app_type] => 1 [patent_app_number] => 8/163763 [patent_app_country] => US [patent_app_date] => 1993-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 34 [patent_no_of_words] => 15446 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/598/05598161.pdf [firstpage_image] =>[orig_patent_app_number] => 163763 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3527270 [patent_doc_number] => 05489905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-06 [patent_title] => 'Merged decoding circuit for analog-to-digital flash conversion' [patent_app_type] => 1 [patent_app_number] => 8/163956 [patent_app_country] => US [patent_app_date] => 1993-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4323 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/489/05489905.pdf [firstpage_image] =>[orig_patent_app_number] => 163956 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3517300 [patent_doc_number] => 05563592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Programmable logic device having a compressed configuration file and associated decompression' [patent_app_type] => 1 [patent_app_number] => 8/156561 [patent_app_country] => US [patent_app_date] => 1993-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5355 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/563/05563592.pdf [firstpage_image] =>[orig_patent_app_number] => 156561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3585594 [patent_doc_number] => 05491481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-13 [patent_title] => 'Compressed digital data recording and reproducing apparatus with selective block deletion' [patent_app_type] => 1 [patent_app_number] => 8/153035 [patent_app_country] => US [patent_app_date] => 1993-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 8947 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/491/05491481.pdf [firstpage_image] =>[orig_patent_app_number] => 153035 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3495609 [patent_doc_number] => 05471210 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-28 [patent_title] => 'Analog digital converter' [patent_app_type] => 1 [patent_app_number] => 8/151852 [patent_app_country] => US [patent_app_date] => 1993-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 8853 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/471/05471210.pdf [firstpage_image] =>[orig_patent_app_number] => 151852 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3558871 [patent_doc_number] => 05493299 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-02-20 [patent_title] => 'Digital/analog conversion apparatus having color palette RAM for multimedia' [patent_app_type] => 1 [patent_app_number] => 8/144567 [patent_app_country] => US [patent_app_date] => 1993-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 8606 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/493/05493299.pdf [firstpage_image] =>[orig_patent_app_number] => 144567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3463727 [patent_doc_number] => 05473327 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-05 [patent_title] => 'Method and apparatus for data encoding with reserved values' [patent_app_type] => 1 [patent_app_number] => 8/144753 [patent_app_country] => US [patent_app_date] => 1993-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2968 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/473/05473327.pdf [firstpage_image] =>[orig_patent_app_number] => 144753 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3493680 [patent_doc_number] => 05475388 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-12 [patent_title] => 'Method and apparatus for using finite state machines to perform channel modulation and error correction and entropy coding' [patent_app_type] => 1 [patent_app_number] => 8/142504 [patent_app_country] => US [patent_app_date] => 1993-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 25 [patent_no_of_words] => 13462 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/475/05475388.pdf [firstpage_image] =>[orig_patent_app_number] => 142504 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3486441 [patent_doc_number] => 05457459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-10 [patent_title] => 'Analog to digital converter for charge coupled signals' [patent_app_type] => 1 [patent_app_number] => 8/137364 [patent_app_country] => US [patent_app_date] => 1993-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 1661 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/457/05457459.pdf [firstpage_image] =>[orig_patent_app_number] => 137364 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3597590 [patent_doc_number] => 05488366 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-30 [patent_title] => 'Segmented variable length decoding apparatus for sequentially decoding single code-word within a fixed number of decoding cycles' [patent_app_type] => 1 [patent_app_number] => 8/134067 [patent_app_country] => US [patent_app_date] => 1993-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6693 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/488/05488366.pdf [firstpage_image] =>[orig_patent_app_number] => 134067 [rel_patent_id] =>[rel_patent_doc_number] =>)