Search

Robert Skudy

Examiner (ID: 9509)

Most Active Art Unit
2102
Art Unit(s)
2101, 2102, 2105, 2899, 3201
Total Applications
1603
Issued Applications
1425
Pending Applications
7
Abandoned Applications
171

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20625935 [patent_doc_number] => 12593460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-31 [patent_title] => Multi-tier deep trench capacitor and methods of forming the same [patent_app_type] => utility [patent_app_number] => 18/733945 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 5547 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18733945 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/733945
MULTI-TIER DEEP TRENCH CAPACITOR AND METHODS OF FORMING THE SAME Jun 4, 2024 Pending
Array ( [id] => 19420943 [patent_doc_number] => 20240297067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => HIGH VOLTAGE DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/664656 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8732 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664656 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/664656
High voltage device and manufacturing method thereof May 14, 2024 Issued
Array ( [id] => 19422346 [patent_doc_number] => 20240298470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => DISPLAY APPARATUS [patent_app_type] => utility [patent_app_number] => 18/662759 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9729 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662759 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662759
DISPLAY APPARATUS May 12, 2024 Pending
Array ( [id] => 19901493 [patent_doc_number] => 12279446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Manufacturing method of semiconductor device [patent_app_type] => utility [patent_app_number] => 18/645366 [patent_app_country] => US [patent_app_date] => 2024-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2329 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18645366 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/645366
Manufacturing method of semiconductor device Apr 23, 2024 Issued
Array ( [id] => 19364387 [patent_doc_number] => 20240266421 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/625547 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 43721 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625547 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/625547
Semiconductor device and method for manufacturing the same Apr 2, 2024 Issued
Array ( [id] => 20111530 [patent_doc_number] => 12362266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Low stress asymmetric dual side module [patent_app_type] => utility [patent_app_number] => 18/595569 [patent_app_country] => US [patent_app_date] => 2024-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 1197 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18595569 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/595569
Low stress asymmetric dual side module Mar 4, 2024 Issued
Array ( [id] => 19980267 [patent_doc_number] => 12347755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Low stress asymmetric dual side module [patent_app_type] => utility [patent_app_number] => 18/592704 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 1196 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18592704 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/592704
Low stress asymmetric dual side module Feb 29, 2024 Issued
Array ( [id] => 19321513 [patent_doc_number] => 20240243060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => SEMICONDUCTOR DEVICE WITH CONDUCTIVE LAYERS HAVING DIFFERENT PATTERN DENSITIES AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/581813 [patent_app_country] => US [patent_app_date] => 2024-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9016 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581813 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/581813
SEMICONDUCTOR DEVICE WITH CONDUCTIVE LAYERS HAVING DIFFERENT PATTERN DENSITIES AND METHOD FOR FABRICATING THE SAME Feb 19, 2024 Abandoned
Array ( [id] => 19221519 [patent_doc_number] => 20240186223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => SEMICONDUCTOR DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 18/440915 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4584 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18440915 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/440915
Semiconductor device package Feb 12, 2024 Issued
Array ( [id] => 19823235 [patent_doc_number] => 20250081442 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/429438 [patent_app_country] => US [patent_app_date] => 2024-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18429438 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/429438
SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Jan 31, 2024 Pending
Array ( [id] => 19146495 [patent_doc_number] => 20240145525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => DISPLAY MODULE AND WEARABLE ELECTRONIC DEVICE COMPRISING SAME [patent_app_type] => utility [patent_app_number] => 18/407986 [patent_app_country] => US [patent_app_date] => 2024-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18407986 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/407986
DISPLAY MODULE AND WEARABLE ELECTRONIC DEVICE COMPRISING SAME Jan 8, 2024 Pending
Array ( [id] => 19879778 [patent_doc_number] => 20250112035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => HYBRID SEMICONDUCTOR WAFER AND METHOD OF FORMING [patent_app_type] => utility [patent_app_number] => 18/401902 [patent_app_country] => US [patent_app_date] => 2024-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18401902 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/401902
HYBRID SEMICONDUCTOR WAFER AND METHOD OF FORMING Jan 1, 2024 Pending
Array ( [id] => 19980323 [patent_doc_number] => 12347812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Low stress asymmetric dual side module [patent_app_type] => utility [patent_app_number] => 18/398499 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398499 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/398499
Low stress asymmetric dual side module Dec 27, 2023 Issued
Array ( [id] => 20080931 [patent_doc_number] => 12355009 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Low stress asymmetric dual side module [patent_app_type] => utility [patent_app_number] => 18/398589 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398589 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/398589
Low stress asymmetric dual side module Dec 27, 2023 Issued
Array ( [id] => 20063511 [patent_doc_number] => 20250201733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => Semiconductor Device and Method of Forming Protective Layer on Substrate to Avoid Damage During Encapsulation [patent_app_type] => utility [patent_app_number] => 18/545467 [patent_app_country] => US [patent_app_date] => 2023-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18545467 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/545467
Semiconductor Device and Method of Forming Protective Layer on Substrate to Avoid Damage During Encapsulation Dec 18, 2023 Pending
Array ( [id] => 20066002 [patent_doc_number] => 20250204224 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => DISPLAY PANELS AND DISPLAY DEVICES [patent_app_type] => utility [patent_app_number] => 18/291450 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 294 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18291450 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/291450
DISPLAY PANELS AND DISPLAY DEVICES Dec 17, 2023 Pending
Array ( [id] => 19286085 [patent_doc_number] => 20240222563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => LIGHT-EMITTING ELEMENT AND LIGHT-EMITTING DEVICE [patent_app_type] => utility [patent_app_number] => 18/533122 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18533122 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/533122
LIGHT-EMITTING ELEMENT AND LIGHT-EMITTING DEVICE Dec 6, 2023 Pending
Array ( [id] => 19517790 [patent_doc_number] => 20240349476 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/529551 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10619 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18529551 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/529551
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME Dec 4, 2023 Pending
Array ( [id] => 20036234 [patent_doc_number] => 20250174456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => THERMAL CVD OF TITANIUM SILICIDE METHODS TO FORM SEMICONDUCTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 18/518943 [patent_app_country] => US [patent_app_date] => 2023-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5573 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518943 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518943
THERMAL CVD OF TITANIUM SILICIDE METHODS TO FORM SEMICONDUCTOR STRUCTURES Nov 23, 2023 Pending
Array ( [id] => 19038205 [patent_doc_number] => 20240088020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => METHOD OF MANUFACTURING INTEGRATED CIRCUIT DEVICE WITH BONDING STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/508581 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18508581 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/508581
Method of manufacturing integrated circuit device with bonding structure Nov 13, 2023 Issued
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