
Robert Song
Examiner (ID: 15638)
| Most Active Art Unit | 3102 |
| Art Unit(s) | 2203, 3102, 3106 |
| Total Applications | 1719 |
| Issued Applications | 1671 |
| Pending Applications | 1 |
| Abandoned Applications | 47 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4182673
[patent_doc_number] => 06159776
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-12
[patent_title] => 'Method for manufacturing semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/167560
[patent_app_country] => US
[patent_app_date] => 1998-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 30
[patent_no_of_words] => 8763
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/159/06159776.pdf
[firstpage_image] =>[orig_patent_app_number] => 167560
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/167560 | Method for manufacturing semiconductor device | Oct 6, 1998 | Issued |
Array
(
[id] => 4292547
[patent_doc_number] => 06180499
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-01-30
[patent_title] => 'Method for forming polysilicon-germanium gate in CMOS transistor and device made thereby'
[patent_app_type] => 1
[patent_app_number] => 9/162917
[patent_app_country] => US
[patent_app_date] => 1998-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2128
[patent_no_of_claims] => 11
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[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/180/06180499.pdf
[firstpage_image] =>[orig_patent_app_number] => 162917
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/162917 | Method for forming polysilicon-germanium gate in CMOS transistor and device made thereby | Sep 28, 1998 | Issued |
Array
(
[id] => 3996717
[patent_doc_number] => 05911107
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-08
[patent_title] => 'MOS transistor read-only memory device'
[patent_app_type] => 1
[patent_app_number] => 9/148190
[patent_app_country] => US
[patent_app_date] => 1998-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 4522
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[pdf_file] => patents/05/911/05911107.pdf
[firstpage_image] =>[orig_patent_app_number] => 148190
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/148190 | MOS transistor read-only memory device | Sep 3, 1998 | Issued |
Array
(
[id] => 1435937
[patent_doc_number] => 06355580
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-12
[patent_title] => 'Ion-assisted oxidation methods and the resulting structures'
[patent_app_type] => B1
[patent_app_number] => 09/146710
[patent_app_country] => US
[patent_app_date] => 1998-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2725
[patent_no_of_claims] => 56
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/355/06355580.pdf
[firstpage_image] =>[orig_patent_app_number] => 09146710
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/146710 | Ion-assisted oxidation methods and the resulting structures | Sep 2, 1998 | Issued |
Array
(
[id] => 4029461
[patent_doc_number] => 05994186
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-30
[patent_title] => 'Contactless flash eprom using poly silicon isolation and process of making the same'
[patent_app_type] => 1
[patent_app_number] => 9/144720
[patent_app_country] => US
[patent_app_date] => 1998-09-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_no_of_words] => 3946
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/994/05994186.pdf
[firstpage_image] =>[orig_patent_app_number] => 144720
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/144720 | Contactless flash eprom using poly silicon isolation and process of making the same | Aug 31, 1998 | Issued |
Array
(
[id] => 4100161
[patent_doc_number] => 06066552
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-05-23
[patent_title] => 'Method and structure for improved alignment tolerance in multiple, singularized plugs'
[patent_app_type] => 1
[patent_app_number] => 9/140810
[patent_app_country] => US
[patent_app_date] => 1998-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/06/066/06066552.pdf
[firstpage_image] =>[orig_patent_app_number] => 140810
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/140810 | Method and structure for improved alignment tolerance in multiple, singularized plugs | Aug 24, 1998 | Issued |
Array
(
[id] => 1415416
[patent_doc_number] => 06511892
[patent_country] => US
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[patent_issue_date] => 2003-01-28
[patent_title] => 'Diffusion-enhanced crystallization of amorphous materials to improve surface roughness'
[patent_app_type] => B1
[patent_app_number] => 09/138879
[patent_app_country] => US
[patent_app_date] => 1998-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[pdf_file] => patents/06/511/06511892.pdf
[firstpage_image] =>[orig_patent_app_number] => 09138879
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/138879 | Diffusion-enhanced crystallization of amorphous materials to improve surface roughness | Aug 23, 1998 | Issued |
Array
(
[id] => 4215755
[patent_doc_number] => 06087255
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-11
[patent_title] => 'Conductive layer with anti-reflective surface portion'
[patent_app_type] => 1
[patent_app_number] => 9/127887
[patent_app_country] => US
[patent_app_date] => 1998-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2690
[patent_no_of_claims] => 25
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/087/06087255.pdf
[firstpage_image] =>[orig_patent_app_number] => 127887
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/127887 | Conductive layer with anti-reflective surface portion | Aug 2, 1998 | Issued |
Array
(
[id] => 1318486
[patent_doc_number] => 06605531
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-08-12
[patent_title] => 'Hole-filling technique using CVD aluminum and PVD aluminum integration'
[patent_app_type] => B1
[patent_app_number] => 09/127010
[patent_app_country] => US
[patent_app_date] => 1998-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/06/605/06605531.pdf
[firstpage_image] =>[orig_patent_app_number] => 09127010
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/127010 | Hole-filling technique using CVD aluminum and PVD aluminum integration | Jul 30, 1998 | Issued |
Array
(
[id] => 4085731
[patent_doc_number] => 06017806
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-01-25
[patent_title] => 'Method to enhance deuterium anneal/implant to reduce channel-hot carrier degradation'
[patent_app_type] => 1
[patent_app_number] => 9/123260
[patent_app_country] => US
[patent_app_date] => 1998-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/06/017/06017806.pdf
[firstpage_image] =>[orig_patent_app_number] => 123260
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/123260 | Method to enhance deuterium anneal/implant to reduce channel-hot carrier degradation | Jul 27, 1998 | Issued |
Array
(
[id] => 4270379
[patent_doc_number] => 06245662
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-06-12
[patent_title] => 'Method of producing an interconnect structure for an integrated circuit'
[patent_app_type] => 1
[patent_app_number] => 9/122080
[patent_app_country] => US
[patent_app_date] => 1998-07-23
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 4383
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[pdf_file] => patents/06/245/06245662.pdf
[firstpage_image] =>[orig_patent_app_number] => 122080
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/122080 | Method of producing an interconnect structure for an integrated circuit | Jul 22, 1998 | Issued |
| 09/118010 | SEMICONDUCTOR DEVICE, METHOD OF FABRICATING SAME, AND, ELECTROOPTICAL DEVICE | Jul 16, 1998 | Abandoned |
Array
(
[id] => 4416679
[patent_doc_number] => 06194226
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-27
[patent_title] => 'Junction between wires employing oxide superconductors and joining method therefor'
[patent_app_type] => 1
[patent_app_number] => 9/112970
[patent_app_country] => US
[patent_app_date] => 1998-07-09
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[pdf_file] => patents/06/194/06194226.pdf
[firstpage_image] =>[orig_patent_app_number] => 112970
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/112970 | Junction between wires employing oxide superconductors and joining method therefor | Jul 8, 1998 | Issued |
Array
(
[id] => 4407876
[patent_doc_number] => 06309906
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-10-30
[patent_title] => 'Photovoltaic cell and method of producing that cell'
[patent_app_type] => 1
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[firstpage_image] =>[orig_patent_app_number] => 101117
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/101117 | Photovoltaic cell and method of producing that cell | Jun 29, 1998 | Issued |
Array
(
[id] => 7643891
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[patent_title] => 'Method for making an insulating film'
[patent_app_type] => B2
[patent_app_number] => 09/106007
[patent_app_country] => US
[patent_app_date] => 1998-06-29
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[firstpage_image] =>[orig_patent_app_number] => 09106007
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/106007 | Method for making an insulating film | Jun 28, 1998 | Issued |
Array
(
[id] => 4408748
[patent_doc_number] => 06265315
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-24
[patent_title] => 'Method for improving chemical/mechanical polish uniformity over rough topography for semiconductor integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 9/104030
[patent_app_country] => US
[patent_app_date] => 1998-06-24
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[pdf_file] => patents/06/265/06265315.pdf
[firstpage_image] =>[orig_patent_app_number] => 104030
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/104030 | Method for improving chemical/mechanical polish uniformity over rough topography for semiconductor integrated circuits | Jun 23, 1998 | Issued |
| 09/102527 | SILICON TRENCH ETCHING USING SILICON-CONTAINING PRECURSORS TO REDUCE OR AVOID MASK EROSION | Jun 21, 1998 | Abandoned |
Array
(
[id] => 4183133
[patent_doc_number] => 06150285
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-11-21
[patent_title] => 'Method for simultaneous deposition and sputtering of TEOS'
[patent_app_type] => 1
[patent_app_number] => 9/099057
[patent_app_country] => US
[patent_app_date] => 1998-06-17
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 099057
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/099057 | Method for simultaneous deposition and sputtering of TEOS | Jun 16, 1998 | Issued |
Array
(
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[patent_issue_date] => 2001-09-06
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => new
[patent_app_number] => 09/097670
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/097670 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Jun 15, 1998 | Abandoned |
Array
(
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[patent_title] => 'Vertical semiconductor device and method of manufacturing the same'
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[firstpage_image] =>[orig_patent_app_number] => 094870
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/094870 | Vertical semiconductor device and method of manufacturing the same | Jun 14, 1998 | Issued |