
Robert T. Huber
Examiner (ID: 18933)
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2892 |
| Total Applications | 651 |
| Issued Applications | 367 |
| Pending Applications | 0 |
| Abandoned Applications | 285 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 12229834
[patent_doc_number] => 09917083
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[patent_issue_date] => 2018-03-13
[patent_title] => 'Semiconductor device with an upper surface of a substrate at different levels and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 13/858142
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/858142 | Semiconductor device with an upper surface of a substrate at different levels and method of manufacturing the same | Apr 7, 2013 | Issued |
Array
(
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[patent_doc_number] => 20140054541
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[patent_issue_date] => 2014-02-27
[patent_title] => 'METHOD OF MANUFACTURING QUANTUM DOT DEVICE, QUANTUM DOT DEVICE MANUFACTURED BY USING THE METHOD, AND METHOD OF MEASURING ELECTRON MOBILITY OF QUANTUM DOT DEVICE'
[patent_app_type] => utility
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Array
(
[id] => 9188885
[patent_doc_number] => 20130328200
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[patent_kind] => A1
[patent_issue_date] => 2013-12-12
[patent_title] => 'DIRECT BONDED COPPER SUBSTRATE AND POWER SEMICONDUCTOR MODULE'
[patent_app_type] => utility
[patent_app_number] => 13/858290
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/858290 | DIRECT BONDED COPPER SUBSTRATE AND POWER SEMICONDUCTOR MODULE | Apr 7, 2013 | Abandoned |
Array
(
[id] => 11360335
[patent_doc_number] => 09536993
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-03
[patent_title] => 'Thin film transistor and method for manufacturing thin film transistor'
[patent_app_type] => utility
[patent_app_number] => 14/386811
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/386811 | Thin film transistor and method for manufacturing thin film transistor | Mar 17, 2013 | Issued |
Array
(
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[patent_issue_date] => 2014-12-16
[patent_title] => 'Replacement metal gate structures providing independent control on work function and gate leakage current'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/789018 | Replacement metal gate structures providing independent control on work function and gate leakage current | Mar 6, 2013 | Issued |
Array
(
[id] => 9038353
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[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME'
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Array
(
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[patent_title] => 'III-V compound semiconductor material passivation with crystalline interlayer'
[patent_app_type] => utility
[patent_app_number] => 13/775968
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/775968 | III-V compound semiconductor material passivation with crystalline interlayer | Feb 24, 2013 | Issued |
Array
(
[id] => 10080037
[patent_doc_number] => 09117893
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[patent_issue_date] => 2015-08-25
[patent_title] => 'Tunneling transistor suitable for low voltage operation'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/759478 | Tunneling transistor suitable for low voltage operation | Feb 4, 2013 | Issued |
Array
(
[id] => 9183815
[patent_doc_number] => 08623747
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[patent_issue_date] => 2014-01-07
[patent_title] => 'Silicon, aluminum oxide, aluminum nitride template for optoelectronic and power devices'
[patent_app_type] => utility
[patent_app_number] => 13/717182
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[patent_app_date] => 2012-12-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/717182 | Silicon, aluminum oxide, aluminum nitride template for optoelectronic and power devices | Dec 16, 2012 | Issued |
Array
(
[id] => 8826016
[patent_doc_number] => 20130127061
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-05-23
[patent_title] => 'INTEGRATED CIRCUIT PACKAGE SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 13/716479
[patent_app_country] => US
[patent_app_date] => 2012-12-17
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/716479 | Integrated circuit having staggered bond pads and I/O cells | Dec 16, 2012 | Issued |
Array
(
[id] => 10016120
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[patent_issue_date] => 2015-06-16
[patent_title] => 'Buried gate transistor'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/665448 | Buried gate transistor | Oct 30, 2012 | Issued |
Array
(
[id] => 10864525
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[patent_title] => 'Nonvolatile semiconductor memory device with a narrowing charge storage layer'
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Array
(
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Array
(
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[patent_title] => 'DEVICE HAVING SERIES-CONNECTED HIGH ELECTRON MOBILITY TRANSISTORS AND MANUFACTURING METHOD THEREOF'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/584897 | DEVICE HAVING SERIES-CONNECTED HIGH ELECTRON MOBILITY TRANSISTORS AND MANUFACTURING METHOD THEREOF | Aug 13, 2012 | Abandoned |
Array
(
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Array
(
[id] => 9889391
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[patent_issue_date] => 2015-03-10
[patent_title] => 'Semiconductor light emitting device including a vertically arranged light transmitting layer and light emitting structure'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/563328 | Semiconductor light emitting device including a vertically arranged light transmitting layer and light emitting structure | Jul 30, 2012 | Issued |
Array
(
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[patent_title] => 'TRANSFER-BONDING METHOD FOR THE LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE ARRAY'
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Array
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Array
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/558082 | Bump structure for yield improvement | Jul 24, 2012 | Issued |