
Robert W. Beausoliel Jr.
Examiner (ID: 5619)
| Most Active Art Unit | 2306 |
| Art Unit(s) | 2184, 2306, 2785, 2113, 2313, 2167, 2413 |
| Total Applications | 522 |
| Issued Applications | 450 |
| Pending Applications | 14 |
| Abandoned Applications | 60 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2640057
[patent_doc_number] => 04916698
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-04-10
[patent_title] => 'Failure detection mechanism for microcontroller based control system'
[patent_app_type] => 1
[patent_app_number] => 7/250807
[patent_app_country] => US
[patent_app_date] => 1988-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2047
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 177
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/916/04916698.pdf
[firstpage_image] =>[orig_patent_app_number] => 250807
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/250807 | Failure detection mechanism for microcontroller based control system | Sep 28, 1988 | Issued |
Array
(
[id] => 2589847
[patent_doc_number] => 04974226
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-27
[patent_title] => 'Circuit for testing integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/247288
[patent_app_country] => US
[patent_app_date] => 1988-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 3301
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/974/04974226.pdf
[firstpage_image] =>[orig_patent_app_number] => 247288
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/247288 | Circuit for testing integrated circuits | Sep 21, 1988 | Issued |
Array
(
[id] => 2589847
[patent_doc_number] => 04974226
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-27
[patent_title] => 'Circuit for testing integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/247288
[patent_app_country] => US
[patent_app_date] => 1988-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 3301
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/974/04974226.pdf
[firstpage_image] =>[orig_patent_app_number] => 247288
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/247288 | Circuit for testing integrated circuits | Sep 21, 1988 | Issued |
Array
(
[id] => 2589847
[patent_doc_number] => 04974226
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-27
[patent_title] => 'Circuit for testing integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/247288
[patent_app_country] => US
[patent_app_date] => 1988-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 3301
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/974/04974226.pdf
[firstpage_image] =>[orig_patent_app_number] => 247288
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/247288 | Diver's safety cap | Sep 20, 1988 | Issued |
Array
(
[id] => 2589847
[patent_doc_number] => 04974226
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-11-27
[patent_title] => 'Circuit for testing integrated circuits'
[patent_app_type] => 1
[patent_app_number] => 7/247288
[patent_app_country] => US
[patent_app_date] => 1988-09-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 3301
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/974/04974226.pdf
[firstpage_image] =>[orig_patent_app_number] => 247288
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/247288 | Diver's safety cap | Sep 20, 1988 | Issued |
Array
(
[id] => 2703660
[patent_doc_number] => 04996691
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-02-26
[patent_title] => 'Integrated circuit testing method and apparatus and integrated circuit devices for use therewith'
[patent_app_type] => 1
[patent_app_number] => 7/247258
[patent_app_country] => US
[patent_app_date] => 1988-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 2576
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/996/04996691.pdf
[firstpage_image] =>[orig_patent_app_number] => 247258
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/247258 | Integrated circuit testing method and apparatus and integrated circuit devices for use therewith | Sep 20, 1988 | Issued |
Array
(
[id] => 2642686
[patent_doc_number] => 04937826
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-26
[patent_title] => 'Method and apparatus for sensing defects in integrated circuit elements'
[patent_app_type] => 1
[patent_app_number] => 7/242848
[patent_app_country] => US
[patent_app_date] => 1988-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 6193
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/937/04937826.pdf
[firstpage_image] =>[orig_patent_app_number] => 242848
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/242848 | Method and apparatus for sensing defects in integrated circuit elements | Sep 8, 1988 | Issued |
Array
(
[id] => 2653165
[patent_doc_number] => 04939734
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-03
[patent_title] => 'Method and a system for coding and decoding data for transmission'
[patent_app_type] => 1
[patent_app_number] => 7/242318
[patent_app_country] => US
[patent_app_date] => 1988-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 2964
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/939/04939734.pdf
[firstpage_image] =>[orig_patent_app_number] => 242318
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/242318 | Method and a system for coding and decoding data for transmission | Sep 8, 1988 | Issued |
Array
(
[id] => 2742748
[patent_doc_number] => 04998250
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-05
[patent_title] => 'Method and apparatus for determining an internal state of an electronic component'
[patent_app_type] => 1
[patent_app_number] => 7/241617
[patent_app_country] => US
[patent_app_date] => 1988-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7146
[patent_no_of_claims] => 49
[patent_no_of_ind_claims] => 11
[patent_words_short_claim] => 215
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/998/04998250.pdf
[firstpage_image] =>[orig_patent_app_number] => 241617
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/241617 | Method and apparatus for determining an internal state of an electronic component | Sep 7, 1988 | Issued |
Array
(
[id] => 2755658
[patent_doc_number] => 05003540
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-03-26
[patent_title] => 'Error correction coding and decoding circuit for digitally coded information'
[patent_app_type] => 1
[patent_app_number] => 7/238838
[patent_app_country] => US
[patent_app_date] => 1988-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2530
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 406
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/003/05003540.pdf
[firstpage_image] =>[orig_patent_app_number] => 238838
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/238838 | Error correction coding and decoding circuit for digitally coded information | Aug 30, 1988 | Issued |
| 07/235249 | SEMICONDUCTOR MEMORY COMPRISING AN ON-CHIP ERROR CORRECTION DEVICE, AND INTEGRATED CIRCUIT COMPRISING SUCH A SEMICONDUCTOR MEMORY | Aug 21, 1988 | Abandoned |
Array
(
[id] => 2607399
[patent_doc_number] => 04965799
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-23
[patent_title] => 'Method and apparatus for testing integrated circuit memories'
[patent_app_type] => 1
[patent_app_number] => 7/228687
[patent_app_country] => US
[patent_app_date] => 1988-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 1264
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/965/04965799.pdf
[firstpage_image] =>[orig_patent_app_number] => 228687
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/228687 | Method and apparatus for testing integrated circuit memories | Aug 4, 1988 | Issued |
Array
(
[id] => 2612952
[patent_doc_number] => 04932029
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-05
[patent_title] => 'Method and apparatus for correcting errors in convolutional code signals'
[patent_app_type] => 1
[patent_app_number] => 7/223948
[patent_app_country] => US
[patent_app_date] => 1988-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 8865
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/932/04932029.pdf
[firstpage_image] =>[orig_patent_app_number] => 223948
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/223948 | Method and apparatus for correcting errors in convolutional code signals | Jul 24, 1988 | Issued |
Array
(
[id] => 2613706
[patent_doc_number] => 04949340
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-14
[patent_title] => 'Redundant repeater'
[patent_app_type] => 1
[patent_app_number] => 7/222148
[patent_app_country] => US
[patent_app_date] => 1988-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 4352
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/949/04949340.pdf
[firstpage_image] =>[orig_patent_app_number] => 222148
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/222148 | Redundant repeater | Jul 20, 1988 | Issued |
Array
(
[id] => 2637019
[patent_doc_number] => 04951283
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-21
[patent_title] => 'Method and apparatus for identifying defective bus devices'
[patent_app_type] => 1
[patent_app_number] => 7/216917
[patent_app_country] => US
[patent_app_date] => 1988-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4404
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/951/04951283.pdf
[firstpage_image] =>[orig_patent_app_number] => 216917
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/216917 | Method and apparatus for identifying defective bus devices | Jul 7, 1988 | Issued |
Array
(
[id] => 2579554
[patent_doc_number] => 04901314
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-13
[patent_title] => 'Failsoft radio control console'
[patent_app_type] => 1
[patent_app_number] => 7/213408
[patent_app_country] => US
[patent_app_date] => 1988-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1846
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/901/04901314.pdf
[firstpage_image] =>[orig_patent_app_number] => 213408
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/213408 | Failsoft radio control console | Jun 29, 1988 | Issued |
Array
(
[id] => 2640038
[patent_doc_number] => 04916697
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-04-10
[patent_title] => 'Apparatus for partitioned clock stopping in response to classified processor errors'
[patent_app_type] => 1
[patent_app_number] => 7/211469
[patent_app_country] => US
[patent_app_date] => 1988-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 8834
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/916/04916697.pdf
[firstpage_image] =>[orig_patent_app_number] => 211469
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/211469 | Apparatus for partitioned clock stopping in response to classified processor errors | Jun 23, 1988 | Issued |
Array
(
[id] => 2535618
[patent_doc_number] => 04888771
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-12-19
[patent_title] => 'Diagnostic configuration management for a data processing system'
[patent_app_type] => 1
[patent_app_number] => 7/210587
[patent_app_country] => US
[patent_app_date] => 1988-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 6970
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 18
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/888/04888771.pdf
[firstpage_image] =>[orig_patent_app_number] => 210587
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/210587 | Diagnostic configuration management for a data processing system | Jun 22, 1988 | Issued |
Array
(
[id] => 2642600
[patent_doc_number] => 04937823
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-26
[patent_title] => 'Ring network configuration'
[patent_app_type] => 1
[patent_app_number] => 7/209719
[patent_app_country] => US
[patent_app_date] => 1988-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3224
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/937/04937823.pdf
[firstpage_image] =>[orig_patent_app_number] => 209719
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/209719 | Ring network configuration | Jun 21, 1988 | Issued |
Array
(
[id] => 2535657
[patent_doc_number] => 04888773
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-12-19
[patent_title] => 'Smart memory card architecture and interface'
[patent_app_type] => 1
[patent_app_number] => 7/206757
[patent_app_country] => US
[patent_app_date] => 1988-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 31
[patent_no_of_words] => 22394
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 204
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/888/04888773.pdf
[firstpage_image] =>[orig_patent_app_number] => 206757
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/206757 | Smart memory card architecture and interface | Jun 14, 1988 | Issued |