
Robert W. Beausoliel Jr.
Examiner (ID: 5619)
| Most Active Art Unit | 2306 |
| Art Unit(s) | 2184, 2306, 2785, 2113, 2313, 2167, 2413 |
| Total Applications | 522 |
| Issued Applications | 450 |
| Pending Applications | 14 |
| Abandoned Applications | 60 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 2642667
[patent_doc_number] => 04937825
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-26
[patent_title] => 'Method and apparatus for diagnosing problems in data communication networks'
[patent_app_type] => 1
[patent_app_number] => 7/207097
[patent_app_country] => US
[patent_app_date] => 1988-06-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 10205
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/937/04937825.pdf
[firstpage_image] =>[orig_patent_app_number] => 207097
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/207097 | Method and apparatus for diagnosing problems in data communication networks | Jun 14, 1988 | Issued |
Array
(
[id] => 2619316
[patent_doc_number] => 04903270
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-20
[patent_title] => 'Apparatus for self checking of functional redundancy check (FRC) logic'
[patent_app_type] => 1
[patent_app_number] => 7/206418
[patent_app_country] => US
[patent_app_date] => 1988-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 3021
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 255
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/903/04903270.pdf
[firstpage_image] =>[orig_patent_app_number] => 206418
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/206418 | Apparatus for self checking of functional redundancy check (FRC) logic | Jun 13, 1988 | Issued |
| 07/205989 | MEANS AND METHODS FOR DETECTING AND CORRECTING MICROINSTRUCTION ERRORS | Jun 12, 1988 | Abandoned |
Array
(
[id] => 2596319
[patent_doc_number] => 04926424
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-15
[patent_title] => 'Test auxiliary circuit for testing semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 7/207919
[patent_app_country] => US
[patent_app_date] => 1988-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 10
[patent_no_of_words] => 5936
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/926/04926424.pdf
[firstpage_image] =>[orig_patent_app_number] => 207919
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/207919 | Test auxiliary circuit for testing semiconductor device | Jun 9, 1988 | Issued |
Array
(
[id] => 2604815
[patent_doc_number] => 04933941
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-12
[patent_title] => 'Apparatus and method for testing the operation of a central processing unit of a data processing system'
[patent_app_type] => 1
[patent_app_number] => 7/203488
[patent_app_country] => US
[patent_app_date] => 1988-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3365
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/933/04933941.pdf
[firstpage_image] =>[orig_patent_app_number] => 203488
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/203488 | Apparatus and method for testing the operation of a central processing unit of a data processing system | Jun 6, 1988 | Issued |
Array
(
[id] => 2644467
[patent_doc_number] => 04953165
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-28
[patent_title] => 'Diagnostic system for personal computer'
[patent_app_type] => 1
[patent_app_number] => 7/202537
[patent_app_country] => US
[patent_app_date] => 1988-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 5879
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 308
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/953/04953165.pdf
[firstpage_image] =>[orig_patent_app_number] => 202537
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/202537 | Diagnostic system for personal computer | Jun 5, 1988 | Issued |
Array
(
[id] => 2653296
[patent_doc_number] => 04939741
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-07-03
[patent_title] => 'Communication control system'
[patent_app_type] => 1
[patent_app_number] => 7/198518
[patent_app_country] => US
[patent_app_date] => 1988-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4328
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/939/04939741.pdf
[firstpage_image] =>[orig_patent_app_number] => 198518
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/198518 | Communication control system | May 24, 1988 | Issued |
Array
(
[id] => 2642773
[patent_doc_number] => 04937830
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-26
[patent_title] => 'Semiconductor memory device having function of checking and correcting error of read-out data'
[patent_app_type] => 1
[patent_app_number] => 7/195329
[patent_app_country] => US
[patent_app_date] => 1988-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 28
[patent_no_of_words] => 6560
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/937/04937830.pdf
[firstpage_image] =>[orig_patent_app_number] => 195329
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/195329 | Semiconductor memory device having function of checking and correcting error of read-out data | May 17, 1988 | Issued |
Array
(
[id] => 2619297
[patent_doc_number] => 04903269
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-20
[patent_title] => 'Error detector for encoded digital signals'
[patent_app_type] => 1
[patent_app_number] => 7/194657
[patent_app_country] => US
[patent_app_date] => 1988-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 6285
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/903/04903269.pdf
[firstpage_image] =>[orig_patent_app_number] => 194657
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/194657 | Error detector for encoded digital signals | May 15, 1988 | Issued |
Array
(
[id] => 2675894
[patent_doc_number] => 04935849
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-19
[patent_title] => 'Chaining and hazard apparatus and method'
[patent_app_type] => 1
[patent_app_number] => 7/194458
[patent_app_country] => US
[patent_app_date] => 1988-05-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3799
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/935/04935849.pdf
[firstpage_image] =>[orig_patent_app_number] => 194458
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/194458 | Chaining and hazard apparatus and method | May 15, 1988 | Issued |
Array
(
[id] => 2708949
[patent_doc_number] => 04989211
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-01-29
[patent_title] => 'Sector mis-synchronization detection method'
[patent_app_type] => 1
[patent_app_number] => 7/193109
[patent_app_country] => US
[patent_app_date] => 1988-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2652
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/989/04989211.pdf
[firstpage_image] =>[orig_patent_app_number] => 193109
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/193109 | Sector mis-synchronization detection method | May 11, 1988 | Issued |
Array
(
[id] => 2619242
[patent_doc_number] => 04903266
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-20
[patent_title] => 'Memory self-test'
[patent_app_type] => 1
[patent_app_number] => 7/187708
[patent_app_country] => US
[patent_app_date] => 1988-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 4393
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/903/04903266.pdf
[firstpage_image] =>[orig_patent_app_number] => 187708
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/187708 | Memory self-test | Apr 28, 1988 | Issued |
Array
(
[id] => 2597251
[patent_doc_number] => 04928280
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-22
[patent_title] => 'Fast processor for multi-bit error correction codes'
[patent_app_type] => 1
[patent_app_number] => 7/187718
[patent_app_country] => US
[patent_app_date] => 1988-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 5854
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/928/04928280.pdf
[firstpage_image] =>[orig_patent_app_number] => 187718
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/187718 | Fast processor for multi-bit error correction codes | Apr 28, 1988 | Issued |
Array
(
[id] => 2606883
[patent_doc_number] => 04924424
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-05-08
[patent_title] => 'Parity prediction for binary adders with selection'
[patent_app_type] => 1
[patent_app_number] => 7/185759
[patent_app_country] => US
[patent_app_date] => 1988-04-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 21
[patent_no_of_words] => 14287
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/924/04924424.pdf
[firstpage_image] =>[orig_patent_app_number] => 185759
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/185759 | Parity prediction for binary adders with selection | Apr 24, 1988 | Issued |
Array
(
[id] => 2642744
[patent_doc_number] => 04937829
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-06-26
[patent_title] => 'Error correcting system and device'
[patent_app_type] => 1
[patent_app_number] => 7/185079
[patent_app_country] => US
[patent_app_date] => 1988-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 35
[patent_no_of_words] => 15153
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/937/04937829.pdf
[firstpage_image] =>[orig_patent_app_number] => 185079
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/185079 | Error correcting system and device | Apr 21, 1988 | Issued |
Array
(
[id] => 2528259
[patent_doc_number] => 04870645
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-09-26
[patent_title] => 'Single syndrome generator for forward and reverse read of high density magnetic tape and method therefor'
[patent_app_type] => 1
[patent_app_number] => 7/183729
[patent_app_country] => US
[patent_app_date] => 1988-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2535
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 218
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/870/04870645.pdf
[firstpage_image] =>[orig_patent_app_number] => 183729
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/183729 | Single syndrome generator for forward and reverse read of high density magnetic tape and method therefor | Apr 19, 1988 | Issued |
Array
(
[id] => 2533098
[patent_doc_number] => 04884274
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1989-11-28
[patent_title] => 'Detection of non-zero errors in the prefix and completion frames of high density magnetic tapes and apparatus therefor'
[patent_app_type] => 1
[patent_app_number] => 7/183149
[patent_app_country] => US
[patent_app_date] => 1988-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2092
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/884/04884274.pdf
[firstpage_image] =>[orig_patent_app_number] => 183149
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/183149 | Detection of non-zero errors in the prefix and completion frames of high density magnetic tapes and apparatus therefor | Apr 18, 1988 | Issued |
Array
(
[id] => 2564268
[patent_doc_number] => 04897837
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-01-30
[patent_title] => 'Test circuit having selective by pass arrangement for test data'
[patent_app_type] => 1
[patent_app_number] => 7/182867
[patent_app_country] => US
[patent_app_date] => 1988-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2624
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/897/04897837.pdf
[firstpage_image] =>[orig_patent_app_number] => 182867
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/182867 | Test circuit having selective by pass arrangement for test data | Apr 12, 1988 | Issued |
Array
(
[id] => 2767516
[patent_doc_number] => 05043984
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-27
[patent_title] => 'Method and system for inspecting microprocessor-based unit and/or component thereof'
[patent_app_type] => 1
[patent_app_number] => 7/180517
[patent_app_country] => US
[patent_app_date] => 1988-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 5528
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 193
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/043/05043984.pdf
[firstpage_image] =>[orig_patent_app_number] => 180517
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/180517 | Method and system for inspecting microprocessor-based unit and/or component thereof | Apr 11, 1988 | Issued |
Array
(
[id] => 2579570
[patent_doc_number] => 04901315
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-02-13
[patent_title] => 'Integrated data and timing circuitry for automatic circuit tester'
[patent_app_type] => 1
[patent_app_number] => 7/177067
[patent_app_country] => US
[patent_app_date] => 1988-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 9
[patent_no_of_words] => 2851
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 298
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/901/04901315.pdf
[firstpage_image] =>[orig_patent_app_number] => 177067
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/177067 | Integrated data and timing circuitry for automatic circuit tester | Apr 3, 1988 | Issued |