Search

Robert W. Hodge

Supervisory Patent Examiner (ID: 10805, Phone: (571)272-2097 , Office: P/3655 )

Most Active Art Unit
1795
Art Unit(s)
3655, 1795, 4121, 1746, 1745, 1729, 3649, 3645
Total Applications
436
Issued Applications
181
Pending Applications
28
Abandoned Applications
231

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19662021 [patent_doc_number] => 20240429086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERS [patent_app_type] => utility [patent_app_number] => 18/829107 [patent_app_country] => US [patent_app_date] => 2024-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 79760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829107 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829107
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERS Sep 8, 2024 Pending
Array ( [id] => 19662021 [patent_doc_number] => 20240429086 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERS [patent_app_type] => utility [patent_app_number] => 18/829107 [patent_app_country] => US [patent_app_date] => 2024-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 79760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829107 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829107
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERS Sep 8, 2024 Pending
Array ( [id] => 19619186 [patent_doc_number] => 20240404866 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPLE METAL LAYERS [patent_app_type] => utility [patent_app_number] => 18/798708 [patent_app_country] => US [patent_app_date] => 2024-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 79939 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18798708 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/798708
3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPLE METAL LAYERS Aug 7, 2024 Pending
Array ( [id] => 19597086 [patent_doc_number] => 12154940 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-11-26 [patent_title] => Stacked staggered electrode foil capacitor structures in semiconductor devices for single and multi-voltage domain applications and method of fabrication [patent_app_type] => utility [patent_app_number] => 18/444455 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6901 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444455 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/444455
Stacked staggered electrode foil capacitor structures in semiconductor devices for single and multi-voltage domain applications and method of fabrication Feb 15, 2024 Issued
Array ( [id] => 19207985 [patent_doc_number] => 20240179884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FORMING A SRAM MEMORY CELL STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/430661 [patent_app_country] => US [patent_app_date] => 2024-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18430661 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/430661
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING A SRAM MEMORY CELL STRUCTURE Feb 1, 2024 Pending
Array ( [id] => 19146260 [patent_doc_number] => 20240145289 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => METHODS FOR PRODUCING A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPLE METAL LAYERS [patent_app_type] => utility [patent_app_number] => 18/542983 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 80245 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542983 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/542983
Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers Dec 17, 2023 Issued
Array ( [id] => 19116373 [patent_doc_number] => 20240128123 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR DIE AND SEMICONDUCTOR DEVICE THEREOF [patent_app_type] => utility [patent_app_number] => 18/542991 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5649 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542991 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/542991
METHOD FOR FORMING SEMICONDUCTOR DIE AND SEMICONDUCTOR DEVICE THEREOF Dec 17, 2023 Pending
Array ( [id] => 19086141 [patent_doc_number] => 20240112942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH SINGLE-CRYSTAL LAYERS [patent_app_type] => utility [patent_app_number] => 18/527269 [patent_app_country] => US [patent_app_date] => 2023-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 79768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527269 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527269
3D semiconductor device and structure with single-crystal layers Dec 1, 2023 Issued
Array ( [id] => 19206141 [patent_doc_number] => 20240178040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => METHODS FOR PRODUCING A 3D SEMICONDUCTOR DEVICE AND STRUCTURE WITH MEMORY CELLS AND MULTIPLE METAL LAYERS [patent_app_type] => utility [patent_app_number] => 18/389577 [patent_app_country] => US [patent_app_date] => 2023-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 80061 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18389577 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/389577
Methods for producing a 3D semiconductor device and structure with memory cells and multiple metal layers Nov 13, 2023 Issued
Array ( [id] => 19008091 [patent_doc_number] => 20240072162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/503210 [patent_app_country] => US [patent_app_date] => 2023-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12668 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18503210 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/503210
SEMICONDUCTOR DEVICE Nov 6, 2023 Pending
Array ( [id] => 18927273 [patent_doc_number] => 20240030277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/479271 [patent_app_country] => US [patent_app_date] => 2023-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18479271 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/479271
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Oct 1, 2023 Pending
Array ( [id] => 18927273 [patent_doc_number] => 20240030277 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/479271 [patent_app_country] => US [patent_app_date] => 2023-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8682 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18479271 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/479271
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Oct 1, 2023 Pending
Array ( [id] => 18927903 [patent_doc_number] => 20240030907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/476929 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30169 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476929 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/476929
SEMICONDUCTOR DEVICE Sep 27, 2023 Pending
Array ( [id] => 18927903 [patent_doc_number] => 20240030907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/476929 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30169 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476929 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/476929
SEMICONDUCTOR DEVICE Sep 27, 2023 Pending
Array ( [id] => 18927903 [patent_doc_number] => 20240030907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/476929 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 30169 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18476929 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/476929
SEMICONDUCTOR DEVICE Sep 27, 2023 Pending
Array ( [id] => 19086234 [patent_doc_number] => 20240113035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => SEMICONDUCTOR DEVICE, BASE-SIDE SEMICONDUCTOR CHIP, AND BONDING-SIDE SEMICONDUCTOR CHIP [patent_app_type] => utility [patent_app_number] => 18/371546 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18371546 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/371546
SEMICONDUCTOR DEVICE, BASE-SIDE SEMICONDUCTOR CHIP, AND BONDING-SIDE SEMICONDUCTOR CHIP Sep 21, 2023 Pending
Array ( [id] => 19086234 [patent_doc_number] => 20240113035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => SEMICONDUCTOR DEVICE, BASE-SIDE SEMICONDUCTOR CHIP, AND BONDING-SIDE SEMICONDUCTOR CHIP [patent_app_type] => utility [patent_app_number] => 18/371546 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18371546 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/371546
SEMICONDUCTOR DEVICE, BASE-SIDE SEMICONDUCTOR CHIP, AND BONDING-SIDE SEMICONDUCTOR CHIP Sep 21, 2023 Pending
Array ( [id] => 18927065 [patent_doc_number] => 20240030069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/473098 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473098 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/473098
INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURE Sep 21, 2023 Pending
Array ( [id] => 18927065 [patent_doc_number] => 20240030069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/473098 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473098 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/473098
INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURE Sep 21, 2023 Pending
Array ( [id] => 18927065 [patent_doc_number] => 20240030069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/473098 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473098 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/473098
INTEGRATED CIRCUIT IN HYBRID ROW HEIGHT STRUCTURE Sep 21, 2023 Pending
Menu