Search

Robert W. Hodge

Supervisory Patent Examiner (ID: 10805, Phone: (571)272-2097 , Office: P/3655 )

Most Active Art Unit
1795
Art Unit(s)
3655, 1795, 4121, 1746, 1745, 1729, 3649, 3645
Total Applications
436
Issued Applications
181
Pending Applications
28
Abandoned Applications
231

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17730825 [patent_doc_number] => 11387227 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-07-12 [patent_title] => Memory device having multiple chips and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/017101 [patent_app_country] => US [patent_app_date] => 2020-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 17558 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17017101 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/017101
Memory device having multiple chips and method for manufacturing the same Sep 9, 2020 Issued
Array ( [id] => 17463841 [patent_doc_number] => 20220077147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => SEMICONDUCTOR STRUCTURE WITH BURIED POWER LINE AND BURIED SIGNAL LINE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/014282 [patent_app_country] => US [patent_app_date] => 2020-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7412 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17014282 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/014282
Semiconductor structure with buried power line and buried signal line and method for manufacturing the same Sep 7, 2020 Issued
Array ( [id] => 16528873 [patent_doc_number] => 20200402954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/007233 [patent_app_country] => US [patent_app_date] => 2020-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8625 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17007233 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/007233
Semiconductor device structure with back-side layer to reduce leakage Aug 30, 2020 Issued
Array ( [id] => 17448308 [patent_doc_number] => 20220068813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => Frontside-to-Backside Intermixing Architecture [patent_app_type] => utility [patent_app_number] => 17/006695 [patent_app_country] => US [patent_app_date] => 2020-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4570 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006695 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/006695
Frontside-to-backside intermixing architecture for coupling a frontside network to a backside network Aug 27, 2020 Issued
Array ( [id] => 17448204 [patent_doc_number] => 20220068709 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => Low Resistivity Tungsten Film And Method Of Manufacture [patent_app_type] => utility [patent_app_number] => 17/002220 [patent_app_country] => US [patent_app_date] => 2020-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17002220 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/002220
Low resistivity tungsten film and method of manufacture Aug 24, 2020 Issued
Array ( [id] => 16487671 [patent_doc_number] => 20200381280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => SELECTIVE ETCH RATE MONITOR [patent_app_type] => utility [patent_app_number] => 16/997807 [patent_app_country] => US [patent_app_date] => 2020-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7357 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16997807 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/997807
Selective etch rate monitor Aug 18, 2020 Issued
Array ( [id] => 17025682 [patent_doc_number] => 20210249554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-12 [patent_title] => ULTRAVIOLET LIGHT-EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/993242 [patent_app_country] => US [patent_app_date] => 2020-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16993242 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/993242
ULTRAVIOLET LIGHT-EMITTING DIODE AND METHOD OF MANUFACTURING THE SAME Aug 12, 2020 Abandoned
Array ( [id] => 18653215 [patent_doc_number] => 20230299055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => SUBSTRATE FOR MANUFACTURING DISPLAY DEVICE, AND METHOD FOR MANUFACTURING DISPLAY DEVICE BY USING SAME [patent_app_type] => utility [patent_app_number] => 18/020608 [patent_app_country] => US [patent_app_date] => 2020-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11345 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18020608 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/020608
SUBSTRATE FOR MANUFACTURING DISPLAY DEVICE, AND METHOD FOR MANUFACTURING DISPLAY DEVICE BY USING SAME Aug 9, 2020 Pending
Array ( [id] => 16625078 [patent_doc_number] => 20210043731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => Transistor And Methods Of Forming Transistors [patent_app_type] => utility [patent_app_number] => 16/986436 [patent_app_country] => US [patent_app_date] => 2020-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16986436 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/986436
Vertical transistors with channel region having vertically elongated crystal grains that individually are directly against both of the top and bottom source/drain regions Aug 5, 2020 Issued
Array ( [id] => 17381351 [patent_doc_number] => 11239384 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Semiconductor wafers and semiconductor devices with barrier layer and methods of manufacturing [patent_app_type] => utility [patent_app_number] => 16/986729 [patent_app_country] => US [patent_app_date] => 2020-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 45 [patent_no_of_words] => 9206 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16986729 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/986729
Semiconductor wafers and semiconductor devices with barrier layer and methods of manufacturing Aug 5, 2020 Issued
Array ( [id] => 16820101 [patent_doc_number] => 11004940 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-11 [patent_title] => Manufacture of power devices having increased cross over current [patent_app_type] => utility [patent_app_number] => 16/945781 [patent_app_country] => US [patent_app_date] => 2020-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 93 [patent_figures_cnt] => 210 [patent_no_of_words] => 24344 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16945781 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/945781
Manufacture of power devices having increased cross over current Jul 30, 2020 Issued
Array ( [id] => 17262961 [patent_doc_number] => 20210375946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => RADIO FREQUENCY INTEGRATED CIRCUIT AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/940093 [patent_app_country] => US [patent_app_date] => 2020-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2074 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16940093 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/940093
Radio frequency integrated circuit having relatively small circuit area and method of fabricating the same Jul 26, 2020 Issued
Array ( [id] => 18047981 [patent_doc_number] => 11521939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Semiconductor device structure having stiffener with two or more contact points for heat dissipating element [patent_app_type] => utility [patent_app_number] => 16/938800 [patent_app_country] => US [patent_app_date] => 2020-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5414 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16938800 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/938800
Semiconductor device structure having stiffener with two or more contact points for heat dissipating element Jul 23, 2020 Issued
Array ( [id] => 16617452 [patent_doc_number] => 20210036105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-04 [patent_title] => VERTICAL COMPOUND SEMICONDUCTOR STRUCTURE AND METHOD FOR PRODUCING THE SAME [patent_app_type] => utility [patent_app_number] => 16/936133 [patent_app_country] => US [patent_app_date] => 2020-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8597 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16936133 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/936133
Vertical compound semiconductor structure and method for producing the same Jul 21, 2020 Issued
Array ( [id] => 16402570 [patent_doc_number] => 20200343428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => LED MODULE HAVING LED CHIPS AS LIGHT SOURCE [patent_app_type] => utility [patent_app_number] => 16/928688 [patent_app_country] => US [patent_app_date] => 2020-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 22636 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16928688 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/928688
LED module having LED chips as light source Jul 13, 2020 Issued
Array ( [id] => 17833864 [patent_doc_number] => 20220271168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/628296 [patent_app_country] => US [patent_app_date] => 2020-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 61450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17628296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/628296
Semiconductor device including metal oxide Jul 12, 2020 Issued
Array ( [id] => 17833864 [patent_doc_number] => 20220271168 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/628296 [patent_app_country] => US [patent_app_date] => 2020-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 61450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17628296 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/628296
Semiconductor device including metal oxide Jul 12, 2020 Issued
Array ( [id] => 17130668 [patent_doc_number] => 20210305437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-30 [patent_title] => SENSOR PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/920492 [patent_app_country] => US [patent_app_date] => 2020-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3806 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16920492 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/920492
SENSOR PACKAGE STRUCTURE Jul 2, 2020 Abandoned
Array ( [id] => 16394662 [patent_doc_number] => 20200335603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => DIFFERENTIATED VOLTAGE THRESHOLD METAL GATE STRUCTURES FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION [patent_app_type] => utility [patent_app_number] => 16/918816 [patent_app_country] => US [patent_app_date] => 2020-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 75790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16918816 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/918816
Differentiated voltage threshold metal gate structures for advanced integrated circuit structure fabrication Jun 30, 2020 Issued
Array ( [id] => 17247306 [patent_doc_number] => 20210367051 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-25 [patent_title] => MEMORY DEVICE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/918259 [patent_app_country] => US [patent_app_date] => 2020-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16918259 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/918259
Memory device and method for forming the same Jun 30, 2020 Issued
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