Search

Robert W. Hodge

Supervisory Patent Examiner (ID: 10805, Phone: (571)272-2097 , Office: P/3655 )

Most Active Art Unit
1795
Art Unit(s)
3655, 1795, 4121, 1746, 1745, 1729, 3649, 3645
Total Applications
436
Issued Applications
181
Pending Applications
28
Abandoned Applications
231

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14691625 [patent_doc_number] => 20190244928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => SEMICONDUCTOR PACKAGES AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 16/387958 [patent_app_country] => US [patent_app_date] => 2019-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16387958 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/387958
Semiconductor packages Apr 17, 2019 Issued
Array ( [id] => 17048163 [patent_doc_number] => 11101353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-24 [patent_title] => Semiconductor device and method of manufacture [patent_app_type] => utility [patent_app_number] => 16/387043 [patent_app_country] => US [patent_app_date] => 2019-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 11491 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16387043 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/387043
Semiconductor device and method of manufacture Apr 16, 2019 Issued
Array ( [id] => 15000249 [patent_doc_number] => 20190319082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => CHIP ON FILM PACKAGE AND DISPLAY DEVICE INCLUDING THE CHIP ON FILM PACKAGE [patent_app_type] => utility [patent_app_number] => 16/385297 [patent_app_country] => US [patent_app_date] => 2019-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12973 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16385297 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/385297
Chip on film package including a protection layer and display device including the chip on film package Apr 15, 2019 Issued
Array ( [id] => 16638161 [patent_doc_number] => 10916678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Method of substrate lift-off for high-efficiency group III-V solar cell for reuse [patent_app_type] => utility [patent_app_number] => 16/385115 [patent_app_country] => US [patent_app_date] => 2019-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1968 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16385115 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/385115
Method of substrate lift-off for high-efficiency group III-V solar cell for reuse Apr 15, 2019 Issued
Array ( [id] => 15093859 [patent_doc_number] => 20190341741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => ENCODED PIXEL STRUCTURE OF VERTICAL CAVITY SURFACE EMITTING LASER AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/386048 [patent_app_country] => US [patent_app_date] => 2019-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8435 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16386048 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/386048
ENCODED PIXEL STRUCTURE OF VERTICAL CAVITY SURFACE EMITTING LASER AND MANUFACTURING METHOD THEREOF Apr 15, 2019 Abandoned
Array ( [id] => 16638161 [patent_doc_number] => 10916678 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Method of substrate lift-off for high-efficiency group III-V solar cell for reuse [patent_app_type] => utility [patent_app_number] => 16/385115 [patent_app_country] => US [patent_app_date] => 2019-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1968 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16385115 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/385115
Method of substrate lift-off for high-efficiency group III-V solar cell for reuse Apr 15, 2019 Issued
Array ( [id] => 16379373 [patent_doc_number] => 20200328216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-15 [patent_title] => SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/383957 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383957 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/383957
Semiconductor structure Apr 14, 2019 Issued
Array ( [id] => 16668556 [patent_doc_number] => 10937814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-02 [patent_title] => Wiring board and display device including metal line with redundant structure and reduced wiring resistance [patent_app_type] => utility [patent_app_number] => 16/383873 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 16851 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383873 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/383873
Wiring board and display device including metal line with redundant structure and reduced wiring resistance Apr 14, 2019 Issued
Array ( [id] => 16699993 [patent_doc_number] => 10950601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Current source using emitter region as base region isolation structure [patent_app_type] => utility [patent_app_number] => 16/383917 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 6535 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383917 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/383917
Current source using emitter region as base region isolation structure Apr 14, 2019 Issued
Array ( [id] => 15625691 [patent_doc_number] => 20200083250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/383855 [patent_app_country] => US [patent_app_date] => 2019-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10430 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16383855 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/383855
Three-dimensional semiconductor device Apr 14, 2019 Issued
Array ( [id] => 18447143 [patent_doc_number] => 11682720 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => Switching transistor and semiconductor module to suppress signal distortion [patent_app_type] => utility [patent_app_number] => 17/047453 [patent_app_country] => US [patent_app_date] => 2019-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 21 [patent_no_of_words] => 9447 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17047453 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/047453
Switching transistor and semiconductor module to suppress signal distortion Mar 19, 2019 Issued
Array ( [id] => 17410309 [patent_doc_number] => 11251208 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-15 [patent_title] => Photosensor, display apparatus, and method of fabricating photosensor [patent_app_type] => utility [patent_app_number] => 16/642734 [patent_app_country] => US [patent_app_date] => 2019-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 7295 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16642734 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/642734
Photosensor, display apparatus, and method of fabricating photosensor Mar 17, 2019 Issued
Array ( [id] => 17787770 [patent_doc_number] => 11410905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-09 [patent_title] => Optimized weight heat spreader for an electronic package [patent_app_type] => utility [patent_app_number] => 16/357053 [patent_app_country] => US [patent_app_date] => 2019-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 4373 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16357053 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/357053
Optimized weight heat spreader for an electronic package Mar 17, 2019 Issued
Array ( [id] => 14875297 [patent_doc_number] => 20190287890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/354540 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10977 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354540 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354540
Semiconductor device with internal and external electrode and method of manufacturing Mar 14, 2019 Issued
Array ( [id] => 17330900 [patent_doc_number] => 11221359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-11 [patent_title] => Determining device operability via metal-induced layer exchange [patent_app_type] => utility [patent_app_number] => 16/355279 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 10381 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16355279 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/355279
Determining device operability via metal-induced layer exchange Mar 14, 2019 Issued
Array ( [id] => 17002743 [patent_doc_number] => 11081566 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Self-aligned contacts for vertical field effect transistors [patent_app_type] => utility [patent_app_number] => 16/354506 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4447 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354506 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354506
Self-aligned contacts for vertical field effect transistors Mar 14, 2019 Issued
Array ( [id] => 15332007 [patent_doc_number] => 20200006333 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/354505 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354505 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354505
Semiconductor devices having different numbers of stacked channels in different regions and methods of manufacturing the same Mar 14, 2019 Issued
Array ( [id] => 14875683 [patent_doc_number] => 20190288083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => HIGH-VOLTAGE METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/354480 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3280 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354480 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354480
High-voltage metal-oxide-semiconductor field effect transistor Mar 14, 2019 Issued
Array ( [id] => 17353179 [patent_doc_number] => 11227826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-01-18 [patent_title] => Semiconductor device having chip stacked and molded [patent_app_type] => utility [patent_app_number] => 16/354501 [patent_app_country] => US [patent_app_date] => 2019-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 25 [patent_no_of_words] => 5141 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16354501 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/354501
Semiconductor device having chip stacked and molded Mar 14, 2019 Issued
Array ( [id] => 17278032 [patent_doc_number] => 20210384230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => ARRAY SUBSTRATE AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/467044 [patent_app_country] => US [patent_app_date] => 2019-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4322 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16467044 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/467044
Array substrate and display panel having organic insulating elastic layer disposed on bending pathway Mar 11, 2019 Issued
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