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Robert Whittenbaugh

Examiner (ID: 10240)

Most Active Art Unit
1201
Art Unit(s)
1201
Total Applications
889
Issued Applications
802
Pending Applications
0
Abandoned Applications
87

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18022743 [patent_doc_number] => 20220374242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => PIPELINE MERGING IN A CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/880426 [patent_app_country] => US [patent_app_date] => 2022-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13569 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880426 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/880426
Pipeline merging in a circuit Aug 2, 2022 Issued
Array ( [id] => 18941723 [patent_doc_number] => 20240036862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => PACKET PROCESSING IN A DISTRIBUTED DIRECTED ACYCLIC GRAPH [patent_app_type] => utility [patent_app_number] => 17/878646 [patent_app_country] => US [patent_app_date] => 2022-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7916 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17878646 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/878646
PACKET PROCESSING IN A DISTRIBUTED DIRECTED ACYCLIC GRAPH Jul 31, 2022 Abandoned
Array ( [id] => 19293610 [patent_doc_number] => 12032964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Speculative execution of dataflow program nodes [patent_app_type] => utility [patent_app_number] => 17/815904 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 15212 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815904
Speculative execution of dataflow program nodes Jul 27, 2022 Issued
Array ( [id] => 19506490 [patent_doc_number] => 12117910 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Virtual device composition in a scalable input/output (I/O) virtualization (S-IOV) architecture [patent_app_type] => utility [patent_app_number] => 17/868596 [patent_app_country] => US [patent_app_date] => 2022-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14632 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868596 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868596
Virtual device composition in a scalable input/output (I/O) virtualization (S-IOV) architecture Jul 18, 2022 Issued
Array ( [id] => 18904519 [patent_doc_number] => 20240020004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => LCS DATA COMPRESSION/DECOMPRESSION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/864118 [patent_app_country] => US [patent_app_date] => 2022-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16875 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17864118 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/864118
LCS data compression/decompression system Jul 12, 2022 Issued
Array ( [id] => 19506934 [patent_doc_number] => 12118357 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Encoded data dependency matrix for power efficiency scheduling [patent_app_type] => utility [patent_app_number] => 17/855621 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5982 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855621 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855621
Encoded data dependency matrix for power efficiency scheduling Jun 29, 2022 Issued
Array ( [id] => 19028983 [patent_doc_number] => 11928341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Sleep control method and sleep control circuit [patent_app_type] => utility [patent_app_number] => 17/849975 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8360 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849975 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849975
Sleep control method and sleep control circuit Jun 26, 2022 Issued
Array ( [id] => 19705595 [patent_doc_number] => 12199645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Parallel-to-serial conversion circuit, parallel-to-serial conversion circuit layout, and memory [patent_app_type] => utility [patent_app_number] => 17/849942 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4824 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849942 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849942
Parallel-to-serial conversion circuit, parallel-to-serial conversion circuit layout, and memory Jun 26, 2022 Issued
Array ( [id] => 18066932 [patent_doc_number] => 20220398020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => METHODS AND APPARATUS TO MANAGE WORKLOAD MEMORY ALLOCATION [patent_app_type] => utility [patent_app_number] => 17/848221 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7925 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848221 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/848221
Methods and apparatus to manage workload memory allocation Jun 22, 2022 Issued
Array ( [id] => 20374067 [patent_doc_number] => 12481501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => Processing apparatus, method and computer program for a vector combining instruction [patent_app_type] => utility [patent_app_number] => 18/577983 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10923 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18577983 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/577983
Processing apparatus, method and computer program for a vector combining instruction Jun 21, 2022 Issued
Array ( [id] => 19481954 [patent_doc_number] => 20240329996 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-03 [patent_title] => PREDICATION TECHNIQUES [patent_app_type] => utility [patent_app_number] => 18/579804 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8124 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18579804 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/579804
PREDICATION TECHNIQUES Jun 21, 2022 Pending
Array ( [id] => 18998151 [patent_doc_number] => 11914999 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Method for accelerating deep neural networks execution with advanced operator fusion [patent_app_type] => utility [patent_app_number] => 17/842748 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 10726 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842748 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/842748
Method for accelerating deep neural networks execution with advanced operator fusion Jun 15, 2022 Issued
Array ( [id] => 18218341 [patent_doc_number] => 11593279 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Graph-based data flow control system [patent_app_type] => utility [patent_app_number] => 17/840247 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 14304 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840247 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/840247
Graph-based data flow control system Jun 13, 2022 Issued
Array ( [id] => 19259966 [patent_doc_number] => 12020026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-25 [patent_title] => Instruction writing method and apparatus, and network device [patent_app_type] => utility [patent_app_number] => 17/840326 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 15914 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840326 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/840326
Instruction writing method and apparatus, and network device Jun 13, 2022 Issued
Array ( [id] => 19530210 [patent_doc_number] => 20240354112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => PROCESSOR, PHYSICAL REGISTER MANAGEMENT METHOD, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 18/574134 [patent_app_country] => US [patent_app_date] => 2022-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18574134 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/574134
Processor, physical register management method, and electronic apparatus May 16, 2022 Issued
Array ( [id] => 18347842 [patent_doc_number] => 20230135952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => SYSTEM FOR MANAGING ACCESS TO A MEMORY RESOURCE BY MULTIPLE USERS [patent_app_type] => utility [patent_app_number] => 17/744171 [patent_app_country] => US [patent_app_date] => 2022-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8774 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17744171 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/744171
System for managing access to a memory resource by multiple users May 12, 2022 Issued
Array ( [id] => 19152586 [patent_doc_number] => 11977497 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => I/O scheduling method based on system call order considering file fragmentation, system for performing same and computer readable storage medium including executions causing processor to perform same [patent_app_type] => utility [patent_app_number] => 17/741917 [patent_app_country] => US [patent_app_date] => 2022-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3714 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17741917 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/741917
I/O scheduling method based on system call order considering file fragmentation, system for performing same and computer readable storage medium including executions causing processor to perform same May 10, 2022 Issued
Array ( [id] => 17832340 [patent_doc_number] => 20220269644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => ELECTRONIC DEVICE AND CO-PROCESSING CHIP [patent_app_type] => utility [patent_app_number] => 17/738421 [patent_app_country] => US [patent_app_date] => 2022-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17738421 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/738421
ELECTRONIC DEVICE AND CO-PROCESSING CHIP May 5, 2022 Abandoned
Array ( [id] => 17809416 [patent_doc_number] => 20220261251 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-18 [patent_title] => PROCESSING DEVICE WITH VECTOR TRANSFORMATION EXECUTION [patent_app_type] => utility [patent_app_number] => 17/737405 [patent_app_country] => US [patent_app_date] => 2022-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6802 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17737405 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/737405
Processing device with vector transformation execution May 4, 2022 Issued
Array ( [id] => 19911854 [patent_doc_number] => 12288065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-29 [patent_title] => Microprocessor with odd and even register sets [patent_app_type] => utility [patent_app_number] => 17/733689 [patent_app_country] => US [patent_app_date] => 2022-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3688 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17733689 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/733689
Microprocessor with odd and even register sets Apr 28, 2022 Issued
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