
Roberto Velez
Supervisory Patent Examiner (ID: 13736, Phone: (571)272-8597 , Office: P/2662 )
| Most Active Art Unit | 2829 |
| Art Unit(s) | 3600, 2829, 2858, 2662 |
| Total Applications | 486 |
| Issued Applications | 302 |
| Pending Applications | 66 |
| Abandoned Applications | 135 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4739006
[patent_doc_number] => 20080232659
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-25
[patent_title] => 'Analysis Processing Method and Device'
[patent_app_type] => utility
[patent_app_number] => 11/883439
[patent_app_country] => US
[patent_app_date] => 2006-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 14543
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0232/20080232659.pdf
[firstpage_image] =>[orig_patent_app_number] => 11883439
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/883439 | Analysis Processing Method and Device | Jan 30, 2006 | Abandoned |
Array
(
[id] => 881570
[patent_doc_number] => 07355421
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-04-08
[patent_title] => 'Semiconductor apparatus testing arrangement and semiconductor apparatus testing method'
[patent_app_type] => utility
[patent_app_number] => 11/339826
[patent_app_country] => US
[patent_app_date] => 2006-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 4927
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/355/07355421.pdf
[firstpage_image] =>[orig_patent_app_number] => 11339826
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/339826 | Semiconductor apparatus testing arrangement and semiconductor apparatus testing method | Jan 25, 2006 | Issued |
Array
(
[id] => 153169
[patent_doc_number] => 07679381
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-03-16
[patent_title] => 'Method and apparatus for nondestructively evaluating light-emitting materials'
[patent_app_type] => utility
[patent_app_number] => 11/307083
[patent_app_country] => US
[patent_app_date] => 2006-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3415
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/679/07679381.pdf
[firstpage_image] =>[orig_patent_app_number] => 11307083
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/307083 | Method and apparatus for nondestructively evaluating light-emitting materials | Jan 22, 2006 | Issued |
Array
(
[id] => 5157890
[patent_doc_number] => 20070170934
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-26
[patent_title] => 'Method and Apparatus for Nondestructive Evaluation of Semiconductor Wafers'
[patent_app_type] => utility
[patent_app_number] => 11/307084
[patent_app_country] => US
[patent_app_date] => 2006-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3443
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0170/20070170934.pdf
[firstpage_image] =>[orig_patent_app_number] => 11307084
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/307084 | Method and Apparatus for Nondestructive Evaluation of Semiconductor Wafers | Jan 22, 2006 | Abandoned |
Array
(
[id] => 5869778
[patent_doc_number] => 20060164110
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-27
[patent_title] => 'Semiconductor device and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 11/336882
[patent_app_country] => US
[patent_app_date] => 2006-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3237
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20060164110.pdf
[firstpage_image] =>[orig_patent_app_number] => 11336882
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/336882 | Semiconductor device and method of fabricating the same | Jan 22, 2006 | Pending |
Array
(
[id] => 5186452
[patent_doc_number] => 20070164760
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'Methods and apparatuses for improved stabilization in a probing system'
[patent_app_type] => utility
[patent_app_number] => 11/335081
[patent_app_country] => US
[patent_app_date] => 2006-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4095
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20070164760.pdf
[firstpage_image] =>[orig_patent_app_number] => 11335081
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/335081 | Methods and apparatuses for improved stabilization in a probing system | Jan 17, 2006 | Issued |
Array
(
[id] => 5692095
[patent_doc_number] => 20060152240
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-07-13
[patent_title] => 'Probe device with micro-pin inserted in interface board'
[patent_app_type] => utility
[patent_app_number] => 11/332079
[patent_app_country] => US
[patent_app_date] => 2006-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2483
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0152/20060152240.pdf
[firstpage_image] =>[orig_patent_app_number] => 11332079
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/332079 | Probe device with micro-pin inserted in interface board | Jan 12, 2006 | Abandoned |
Array
(
[id] => 5186456
[patent_doc_number] => 20070164764
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-07-19
[patent_title] => 'Method of kelvin current sense in a semiconductor package'
[patent_app_type] => utility
[patent_app_number] => 11/331783
[patent_app_country] => US
[patent_app_date] => 2006-01-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4275
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0164/20070164764.pdf
[firstpage_image] =>[orig_patent_app_number] => 11331783
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/331783 | Method of Kelvin current sense in a semiconductor package | Jan 12, 2006 | Issued |
Array
(
[id] => 5746095
[patent_doc_number] => 20060109025
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-05-25
[patent_title] => 'Testing method for array substrate'
[patent_app_type] => utility
[patent_app_number] => 11/329124
[patent_app_country] => US
[patent_app_date] => 2006-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7368
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0109/20060109025.pdf
[firstpage_image] =>[orig_patent_app_number] => 11329124
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/329124 | Testing method for array substrate | Jan 10, 2006 | Issued |
Array
(
[id] => 559941
[patent_doc_number] => 07468612
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-12-23
[patent_title] => 'Dermal phase meter with improved replaceable probe tips'
[patent_app_type] => utility
[patent_app_number] => 11/306686
[patent_app_country] => US
[patent_app_date] => 2006-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 4270
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 288
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/468/07468612.pdf
[firstpage_image] =>[orig_patent_app_number] => 11306686
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/306686 | Dermal phase meter with improved replaceable probe tips | Jan 5, 2006 | Issued |
Array
(
[id] => 5681251
[patent_doc_number] => 20060197518
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-09-07
[patent_title] => 'PARAMETRIC MEASURING CIRCUIT FOR MINIMIZING OSCILLATION EFFECT'
[patent_app_type] => utility
[patent_app_number] => 11/306382
[patent_app_country] => US
[patent_app_date] => 2005-12-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2680
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0197/20060197518.pdf
[firstpage_image] =>[orig_patent_app_number] => 11306382
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/306382 | PARAMETRIC MEASURING CIRCUIT FOR MINIMIZING OSCILLATION EFFECT | Dec 26, 2005 | Abandoned |
Array
(
[id] => 5117318
[patent_doc_number] => 20070139032
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-21
[patent_title] => 'Integrated current sensor'
[patent_app_type] => utility
[patent_app_number] => 11/311603
[patent_app_country] => US
[patent_app_date] => 2005-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3585
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0139/20070139032.pdf
[firstpage_image] =>[orig_patent_app_number] => 11311603
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/311603 | Integrated current sensor | Dec 18, 2005 | Issued |
Array
(
[id] => 5146262
[patent_doc_number] => 20070046316
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-03-01
[patent_title] => 'Test circuit for flat panel display device'
[patent_app_type] => utility
[patent_app_number] => 11/301479
[patent_app_country] => US
[patent_app_date] => 2005-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4427
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0046/20070046316.pdf
[firstpage_image] =>[orig_patent_app_number] => 11301479
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/301479 | Test circuit for flat panel display device | Dec 11, 2005 | Issued |
Array
(
[id] => 436355
[patent_doc_number] => 07262613
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-08-28
[patent_title] => 'Inspection method and inspection apparatus for inspecting electrical characteristics of inspection object'
[patent_app_type] => utility
[patent_app_number] => 11/296482
[patent_app_country] => US
[patent_app_date] => 2005-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 4669
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/262/07262613.pdf
[firstpage_image] =>[orig_patent_app_number] => 11296482
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/296482 | Inspection method and inspection apparatus for inspecting electrical characteristics of inspection object | Dec 7, 2005 | Issued |
Array
(
[id] => 5837672
[patent_doc_number] => 20060118330
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-08
[patent_title] => 'Wired circuit board and connecting structure thereof'
[patent_app_type] => utility
[patent_app_number] => 11/295520
[patent_app_country] => US
[patent_app_date] => 2005-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 8801
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0118/20060118330.pdf
[firstpage_image] =>[orig_patent_app_number] => 11295520
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/295520 | Wired circuit board and connecting structure thereof | Dec 6, 2005 | Issued |
Array
(
[id] => 5617342
[patent_doc_number] => 20060186874
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-08-24
[patent_title] => 'System and method for mechanical testing of freestanding microscale to nanoscale thin films'
[patent_app_type] => utility
[patent_app_number] => 11/292958
[patent_app_country] => US
[patent_app_date] => 2005-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 8356
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0186/20060186874.pdf
[firstpage_image] =>[orig_patent_app_number] => 11292958
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/292958 | System and method for mechanical testing of freestanding microscale to nanoscale thin films | Dec 1, 2005 | Abandoned |
Array
(
[id] => 5276047
[patent_doc_number] => 20090128179
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-21
[patent_title] => 'Wiring Pattern Characteristic Evaluation Mounting Board'
[patent_app_type] => utility
[patent_app_number] => 12/084582
[patent_app_country] => US
[patent_app_date] => 2006-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 7009
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0128/20090128179.pdf
[firstpage_image] =>[orig_patent_app_number] => 12084582
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/084582 | Wiring pattern characteristic evaluation mounting board | Nov 29, 2005 | Issued |
Array
(
[id] => 5646374
[patent_doc_number] => 20060132106
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-06-22
[patent_title] => 'System and method for regenerative burn-in'
[patent_app_type] => utility
[patent_app_number] => 11/287580
[patent_app_country] => US
[patent_app_date] => 2005-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 3919
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0132/20060132106.pdf
[firstpage_image] =>[orig_patent_app_number] => 11287580
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/287580 | System and method for regenerative burn-in | Nov 22, 2005 | Abandoned |
Array
(
[id] => 5519092
[patent_doc_number] => 20090027073
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-29
[patent_title] => 'DEVICE MOUNTED APPARATUS, TEST HEAD, AND ELECTRONIC DEVICE TEST SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/093976
[patent_app_country] => US
[patent_app_date] => 2005-11-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6112
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0027/20090027073.pdf
[firstpage_image] =>[orig_patent_app_number] => 12093976
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/093976 | Device mounted apparatus, test head, and electronic device test system | Nov 16, 2005 | Issued |
Array
(
[id] => 334779
[patent_doc_number] => 07508191
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-24
[patent_title] => 'Pin electronics implemented system and method for reduced index time'
[patent_app_type] => utility
[patent_app_number] => 11/264949
[patent_app_country] => US
[patent_app_date] => 2005-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 17
[patent_no_of_words] => 12051
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 410
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/508/07508191.pdf
[firstpage_image] =>[orig_patent_app_number] => 11264949
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/264949 | Pin electronics implemented system and method for reduced index time | Oct 31, 2005 | Issued |