
Rocio Del Mar Perez-velez
Examiner (ID: 14017, Phone: (571)270-5935 , Office: P/2132 )
| Most Active Art Unit | 2132 |
| Art Unit(s) | 2182, 2117, 2187, 2132, 2133, 2100 |
| Total Applications | 253 |
| Issued Applications | 200 |
| Pending Applications | 2 |
| Abandoned Applications | 50 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7809016
[patent_doc_number] => 20120059970
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-08
[patent_title] => 'MEMORY CONTROLLER SUPPORTING CONCURRENT VOLATILE AND NONVOLATILE MEMORY MODULES IN A MEMORY BUS ARCHITECTURE'
[patent_app_type] => utility
[patent_app_number] => 13/082383
[patent_app_country] => US
[patent_app_date] => 2011-04-07
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0059/20120059970.pdf
[firstpage_image] =>[orig_patent_app_number] => 13082383
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/082383 | Memory controller supporting concurrent volatile and nonvolatile memory modules in a memory bus architecture | Apr 6, 2011 | Issued |
Array
(
[id] => 9611564
[patent_doc_number] => 08788753
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-22
[patent_title] => 'Systems configured for improved storage system communication for N-way interconnectivity'
[patent_app_type] => utility
[patent_app_number] => 13/082148
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[patent_app_date] => 2011-04-07
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Array
(
[id] => 8511963
[patent_doc_number] => 20120311371
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-06
[patent_title] => 'TIME MULTIPLEXING AT DIFFERENT RATES TO ACCESS DIFFERENT MEMORY TYPES'
[patent_app_type] => utility
[patent_app_number] => 13/578736
[patent_app_country] => US
[patent_app_date] => 2010-11-23
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/578736 | Time multiplexing at different rates to access different memory types | Nov 22, 2010 | Issued |
Array
(
[id] => 6171602
[patent_doc_number] => 20110197038
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-11
[patent_title] => 'SERVICING LOW-LATENCY REQUESTS AHEAD OF BEST-EFFORT REQUESTS'
[patent_app_type] => utility
[patent_app_number] => 12/881963
[patent_app_country] => US
[patent_app_date] => 2010-09-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0197/20110197038.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/881963 | SERVICING LOW-LATENCY REQUESTS AHEAD OF BEST-EFFORT REQUESTS | Sep 13, 2010 | Abandoned |
Array
(
[id] => 9077427
[patent_doc_number] => 08555019
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[patent_issue_date] => 2013-10-08
[patent_title] => 'Using a migration cache to cache tracks during migration'
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[patent_app_number] => 12/877956
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/877956 | Using a migration cache to cache tracks during migration | Sep 7, 2010 | Issued |
Array
(
[id] => 8678583
[patent_doc_number] => 08386717
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[patent_kind] => B1
[patent_issue_date] => 2013-02-26
[patent_title] => 'Method and apparatus to free up cache memory space with a pseudo least recently used scheme'
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Array
(
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[patent_doc_number] => 08595465
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[patent_issue_date] => 2013-11-26
[patent_title] => 'Virtual address to physical address translation using prediction logic'
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Array
(
[id] => 10854111
[patent_doc_number] => 08880820
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-11-04
[patent_title] => 'Techniques for using sparse files during snapshots'
[patent_app_type] => utility
[patent_app_number] => 12/877186
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Array
(
[id] => 7722008
[patent_doc_number] => 20120011343
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-12
[patent_title] => 'DATA PROCESSING APPARATUS AND METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/876524
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[firstpage_image] =>[orig_patent_app_number] => 12876524
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/876524 | Data processing apparatus using pre-fetched data | Sep 6, 2010 | Issued |
Array
(
[id] => 9012416
[patent_doc_number] => 08527736
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[patent_issue_date] => 2013-09-03
[patent_title] => 'Systems and methods for improving address translation speed'
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Array
(
[id] => 7809022
[patent_doc_number] => 20120059976
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-03-08
[patent_title] => 'STORAGE ARRAY CONTROLLER FOR SOLID-STATE STORAGE DEVICES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/876393 | STORAGE ARRAY CONTROLLER FOR SOLID-STATE STORAGE DEVICES | Sep 6, 2010 | Abandoned |
Array
(
[id] => 9077434
[patent_doc_number] => 08555026
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-08
[patent_title] => 'Methods and systems for storing variable width stack elements in a single memory stack'
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Array
(
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Array
(
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Array
(
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Array
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Array
(
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Array
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Array
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Array
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