Search

Rocio Del Mar Perez-velez

Examiner (ID: 14017, Phone: (571)270-5935 , Office: P/2132 )

Most Active Art Unit
2132
Art Unit(s)
2182, 2117, 2187, 2132, 2133, 2100
Total Applications
253
Issued Applications
200
Pending Applications
2
Abandoned Applications
50

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11102732 [patent_doc_number] => 20160299701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'ACCESS CONTROLLING METHOD OF DUAL PORT MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/989734 [patent_app_country] => US [patent_app_date] => 2016-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6414 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14989734 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/989734
Access controlling method of dual port memory system Jan 5, 2016 Issued
Array ( [id] => 13096729 [patent_doc_number] => 10067705 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-04 [patent_title] => Hybrid compression for large history compressors [patent_app_type] => utility [patent_app_number] => 14/985460 [patent_app_country] => US [patent_app_date] => 2015-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3706 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14985460 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/985460
Hybrid compression for large history compressors Dec 30, 2015 Issued
Array ( [id] => 10991282 [patent_doc_number] => 20160188227 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-30 [patent_title] => 'METHOD AND APPARATUS FOR WRITING DATA INTO SOLID STATE DISK' [patent_app_type] => utility [patent_app_number] => 14/979744 [patent_app_country] => US [patent_app_date] => 2015-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9724 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14979744 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/979744
METHOD AND APPARATUS FOR WRITING DATA INTO SOLID STATE DISK Dec 27, 2015 Abandoned
Array ( [id] => 11716813 [patent_doc_number] => 20170185312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'STORAGE ZONE SET MEMBERSHIP' [patent_app_type] => utility [patent_app_number] => 14/979873 [patent_app_country] => US [patent_app_date] => 2015-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7161 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14979873 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/979873
Storage zone set membership Dec 27, 2015 Issued
Array ( [id] => 10809338 [patent_doc_number] => 20160155497 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-02 [patent_title] => 'LOWER PAGE READ FOR MULTI-LEVEL CELL MEMORY' [patent_app_type] => utility [patent_app_number] => 14/954002 [patent_app_country] => US [patent_app_date] => 2015-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 9929 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14954002 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/954002
Lower page read for multi-level cell memory Nov 29, 2015 Issued
Array ( [id] => 14601167 [patent_doc_number] => 10353776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Memory system for performing read retry operation and operating method thereof [patent_app_type] => utility [patent_app_number] => 14/930351 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6252 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14930351 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/930351
Memory system for performing read retry operation and operating method thereof Nov 1, 2015 Issued
Array ( [id] => 14601167 [patent_doc_number] => 10353776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Memory system for performing read retry operation and operating method thereof [patent_app_type] => utility [patent_app_number] => 14/930351 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6252 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14930351 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/930351
Memory system for performing read retry operation and operating method thereof Nov 1, 2015 Issued
Array ( [id] => 12413754 [patent_doc_number] => 09971527 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-15 [patent_title] => Apparatus and method for managing storage for placing backup data into data blocks based on frequency information [patent_app_type] => utility [patent_app_number] => 14/929694 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11991 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 390 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929694 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929694
Apparatus and method for managing storage for placing backup data into data blocks based on frequency information Nov 1, 2015 Issued
Array ( [id] => 11606385 [patent_doc_number] => 20170123688 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-04 [patent_title] => 'DYNAMIC MODULATION OF CACHE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/929458 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5750 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14929458 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/929458
Dynamic modulation of cache memory Nov 1, 2015 Issued
Array ( [id] => 14601167 [patent_doc_number] => 10353776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Memory system for performing read retry operation and operating method thereof [patent_app_type] => utility [patent_app_number] => 14/930351 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6252 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14930351 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/930351
Memory system for performing read retry operation and operating method thereof Nov 1, 2015 Issued
Array ( [id] => 14601167 [patent_doc_number] => 10353776 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-16 [patent_title] => Memory system for performing read retry operation and operating method thereof [patent_app_type] => utility [patent_app_number] => 14/930351 [patent_app_country] => US [patent_app_date] => 2015-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6252 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14930351 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/930351
Memory system for performing read retry operation and operating method thereof Nov 1, 2015 Issued
Array ( [id] => 10755419 [patent_doc_number] => 20160101571 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-14 [patent_title] => 'SYSTEMS AND METHODS FOR GENERATING ORTHOTIC DEVICE MODELS BY SURFACE MAPPING AND EXTRUSION' [patent_app_type] => utility [patent_app_number] => 14/877171 [patent_app_country] => US [patent_app_date] => 2015-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9891 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14877171 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/877171
SYSTEMS AND METHODS FOR GENERATING ORTHOTIC DEVICE MODELS BY SURFACE MAPPING AND EXTRUSION Oct 6, 2015 Abandoned
Array ( [id] => 12108222 [patent_doc_number] => 09864707 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-01-09 [patent_title] => 'Time multiplexing at different rates to access different memory types' [patent_app_type] => utility [patent_app_number] => 14/866911 [patent_app_country] => US [patent_app_date] => 2015-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 31 [patent_no_of_words] => 15031 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14866911 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/866911
Time multiplexing at different rates to access different memory types Sep 25, 2015 Issued
Array ( [id] => 10672991 [patent_doc_number] => 20160019136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'NON-VOLATILE MEMORY INTERFACE' [patent_app_type] => utility [patent_app_number] => 14/866385 [patent_app_country] => US [patent_app_date] => 2015-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 37171 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14866385 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/866385
Non-volatile memory interface Sep 24, 2015 Issued
Array ( [id] => 14886629 [patent_doc_number] => 10423354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-24 [patent_title] => Selective data copying between memory modules [patent_app_type] => utility [patent_app_number] => 14/863026 [patent_app_country] => US [patent_app_date] => 2015-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5989 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14863026 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/863026
Selective data copying between memory modules Sep 22, 2015 Issued
Array ( [id] => 11131179 [patent_doc_number] => 20160328155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-10 [patent_title] => 'MEMORY SYSTEM AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/863027 [patent_app_country] => US [patent_app_date] => 2015-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 14323 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14863027 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/863027
MEMORY SYSTEM AND OPERATING METHOD THEREOF Sep 22, 2015 Abandoned
Array ( [id] => 13097075 [patent_doc_number] => 10067878 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-04 [patent_title] => Processor with logical mentor [patent_app_type] => utility [patent_app_number] => 14/863041 [patent_app_country] => US [patent_app_date] => 2015-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 39812 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14863041 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/863041
Processor with logical mentor Sep 22, 2015 Issued
Array ( [id] => 13082891 [patent_doc_number] => 10061511 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Computing device with frames/bins structure, mentor layer and plural operand processing [patent_app_type] => utility [patent_app_number] => 14/863022 [patent_app_country] => US [patent_app_date] => 2015-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 39934 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14863022 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/863022
Computing device with frames/bins structure, mentor layer and plural operand processing Sep 22, 2015 Issued
Array ( [id] => 10724358 [patent_doc_number] => 20160070506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-10 [patent_title] => 'DEVICE AND METHOD FOR STORING DATA IN A PLURALITY OF MULTI-LEVEL CELL MEMORY CHIPS' [patent_app_type] => utility [patent_app_number] => 14/849028 [patent_app_country] => US [patent_app_date] => 2015-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6690 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14849028 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/849028
Device and method for storing data in a plurality of multi-level cell memory chips Sep 8, 2015 Issued
Array ( [id] => 11494280 [patent_doc_number] => 20170068465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-09 [patent_title] => 'Hybrid Heap Memory Management' [patent_app_type] => utility [patent_app_number] => 14/849041 [patent_app_country] => US [patent_app_date] => 2015-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6731 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14849041 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/849041
Hybrid heap memory management Sep 8, 2015 Issued
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