
Rocio Del Mar Perez-velez
Examiner (ID: 4591, Phone: (571)270-5935 , Office: P/2132 )
| Most Active Art Unit | 2132 |
| Art Unit(s) | 2182, 2100, 2187, 2117, 2133, 2132 |
| Total Applications | 254 |
| Issued Applications | 200 |
| Pending Applications | 5 |
| Abandoned Applications | 50 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 15546791
[patent_doc_number] => 10573185
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-02-25
[patent_title] => System and method to protect the privacy of ADS-B messages
[patent_app_type] => utility
[patent_app_number] => 15/478417
[patent_app_country] => US
[patent_app_date] => 2017-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 3676
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15478417
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/478417 | System and method to protect the privacy of ADS-B messages | Apr 3, 2017 | Issued |
Array
(
[id] => 11746568
[patent_doc_number] => 20170200641
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-07-13
[patent_title] => 'Self-Aligned Double Spacer Patterning Process'
[patent_app_type] => utility
[patent_app_number] => 15/470446
[patent_app_country] => US
[patent_app_date] => 2017-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 5457
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15470446
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/470446 | Self-aligned double spacer patterning process | Mar 26, 2017 | Issued |
Array
(
[id] => 13543341
[patent_doc_number] => 20180323217
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-11-08
[patent_title] => DISTRIBUTION OF TFT COMPONENTS IN LTPS PROCESS
[patent_app_type] => utility
[patent_app_number] => 15/523001
[patent_app_country] => US
[patent_app_date] => 2017-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2683
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15523001
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/523001 | Distribution of TFT components in LTPS process | Mar 13, 2017 | Issued |
Array
(
[id] => 14011627
[patent_doc_number] => 10224289
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-03-05
[patent_title] => Display device having an alignment mark
[patent_app_type] => utility
[patent_app_number] => 15/456983
[patent_app_country] => US
[patent_app_date] => 2017-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7036
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456983
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/456983 | Display device having an alignment mark | Mar 12, 2017 | Issued |
Array
(
[id] => 14859195
[patent_doc_number] => 10418332
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-09-17
[patent_title] => Semiconductor device and method of forming partition fence and shielding layer around semiconductor components
[patent_app_type] => utility
[patent_app_number] => 15/456972
[patent_app_country] => US
[patent_app_date] => 2017-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 15
[patent_no_of_words] => 3430
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15456972
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/456972 | Semiconductor device and method of forming partition fence and shielding layer around semiconductor components | Mar 12, 2017 | Issued |
Array
(
[id] => 11959500
[patent_doc_number] => 20170263653
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-14
[patent_title] => 'PIXEL STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 15/457197
[patent_app_country] => US
[patent_app_date] => 2017-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 6026
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15457197
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/457197 | Pixel structure | Mar 12, 2017 | Issued |
Array
(
[id] => 13293443
[patent_doc_number] => 10157922
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-18
[patent_title] => Interconnect metal layout for integrated circuit
[patent_app_type] => utility
[patent_app_number] => 15/457640
[patent_app_country] => US
[patent_app_date] => 2017-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 29
[patent_no_of_words] => 11687
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15457640
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/457640 | Interconnect metal layout for integrated circuit | Mar 12, 2017 | Issued |
Array
(
[id] => 11959301
[patent_doc_number] => 20170263453
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-14
[patent_title] => 'SUBSTRATE AND ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/454327
[patent_app_country] => US
[patent_app_date] => 2017-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 6551
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15454327
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/454327 | Substrate and electronic device | Mar 8, 2017 | Issued |
Array
(
[id] => 13862329
[patent_doc_number] => 10192890
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-01-29
[patent_title] => Transistor array panel and method of manufacturing thereof
[patent_app_type] => utility
[patent_app_number] => 15/454337
[patent_app_country] => US
[patent_app_date] => 2017-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 6988
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15454337
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/454337 | Transistor array panel and method of manufacturing thereof | Mar 8, 2017 | Issued |
Array
(
[id] => 11967081
[patent_doc_number] => 20170271233
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-21
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/454421
[patent_app_country] => US
[patent_app_date] => 2017-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 13864
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15454421
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/454421 | Semiconductor device | Mar 8, 2017 | Issued |
Array
(
[id] => 12122492
[patent_doc_number] => 20180006077
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-04
[patent_title] => 'IMAGE SENSOR HAVING PHOTODIODES SHARING ONE COLOR FILTER AND ONE MICRO-LENS'
[patent_app_type] => utility
[patent_app_number] => 15/454431
[patent_app_country] => US
[patent_app_date] => 2017-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 6758
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15454431
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/454431 | Image sensor having photodiodes sharing one color filter and one micro-lens | Mar 8, 2017 | Issued |
Array
(
[id] => 12738814
[patent_doc_number] => 20180138105
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-17
[patent_title] => THERMAL DISSIPATION DEVICE AND SEMICONDUCTOR PACKAGE DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/454646
[patent_app_country] => US
[patent_app_date] => 2017-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6448
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15454646
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/454646 | Thermal dissipation device and semiconductor package device including the same | Mar 8, 2017 | Issued |
Array
(
[id] => 15077933
[patent_doc_number] => 10468467
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-11-05
[patent_title] => Organic electroluminescence display device
[patent_app_type] => utility
[patent_app_number] => 16/084279
[patent_app_country] => US
[patent_app_date] => 2017-03-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 10146
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16084279
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/084279 | Organic electroluminescence display device | Mar 7, 2017 | Issued |
Array
(
[id] => 13006099
[patent_doc_number] => 10026724
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-07-17
[patent_title] => Semiconductor package and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 15/444277
[patent_app_country] => US
[patent_app_date] => 2017-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 11137
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 182
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15444277
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/444277 | Semiconductor package and method of manufacturing the same | Feb 26, 2017 | Issued |
Array
(
[id] => 13159669
[patent_doc_number] => 10096569
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-10-09
[patent_title] => Semiconductor device and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 15/444130
[patent_app_country] => US
[patent_app_date] => 2017-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2549
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15444130
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/444130 | Semiconductor device and method for manufacturing the same | Feb 26, 2017 | Issued |
Array
(
[id] => 12427761
[patent_doc_number] => 09975761
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-22
[patent_title] => Method of manufacturing a plurality of through-holes in a layer of first material
[patent_app_type] => utility
[patent_app_number] => 15/444086
[patent_app_country] => US
[patent_app_date] => 2017-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 3310
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 317
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15444086
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/444086 | Method of manufacturing a plurality of through-holes in a layer of first material | Feb 26, 2017 | Issued |
Array
(
[id] => 15089093
[patent_doc_number] => 20190339357
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-07
[patent_title] => BUILT-IN SENSOR FOR INTERCEPTING RADIOELECTRIC COM/RAD EMISSIONS
[patent_app_type] => utility
[patent_app_number] => 16/076406
[patent_app_country] => US
[patent_app_date] => 2017-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4682
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 159
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16076406
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/076406 | Built-in sensor for intercepting radioelectric COM/RAD emissions | Feb 23, 2017 | Issued |
Array
(
[id] => 17700201
[patent_doc_number] => 11373935
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-06-28
[patent_title] => Semiconductor package with plurality of leads and sealing resin
[patent_app_type] => utility
[patent_app_number] => 15/428421
[patent_app_country] => US
[patent_app_date] => 2017-02-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 29
[patent_no_of_words] => 11663
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 358
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15428421
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/428421 | Semiconductor package with plurality of leads and sealing resin | Feb 8, 2017 | Issued |
Array
(
[id] => 16408125
[patent_doc_number] => 10816675
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-10-27
[patent_title] => Coordinate output method and coordinate output device
[patent_app_type] => utility
[patent_app_number] => 16/076560
[patent_app_country] => US
[patent_app_date] => 2017-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 8983
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 200
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16076560
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/076560 | Coordinate output method and coordinate output device | Feb 6, 2017 | Issued |
Array
(
[id] => 13932109
[patent_doc_number] => 20190049570
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-02-14
[patent_title] => PRESENCE DETECTION SYSTEM
[patent_app_type] => utility
[patent_app_number] => 16/077340
[patent_app_country] => US
[patent_app_date] => 2017-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5381
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16077340
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/077340 | Presence detection system | Feb 5, 2017 | Issued |