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Rocio Del Mar Perez-velez

Examiner (ID: 4591, Phone: (571)270-5935 , Office: P/2132 )

Most Active Art Unit
2132
Art Unit(s)
2182, 2100, 2187, 2117, 2133, 2132
Total Applications
254
Issued Applications
200
Pending Applications
5
Abandoned Applications
50

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19206098 [patent_doc_number] => 20240177997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => Method of Operating a PVD Apparatus [patent_app_type] => utility [patent_app_number] => 18/244904 [patent_app_country] => US [patent_app_date] => 2023-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18244904 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/244904
Method of Operating a PVD Apparatus Sep 10, 2023 Pending
Array ( [id] => 19206098 [patent_doc_number] => 20240177997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => Method of Operating a PVD Apparatus [patent_app_type] => utility [patent_app_number] => 18/244904 [patent_app_country] => US [patent_app_date] => 2023-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18244904 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/244904
Method of Operating a PVD Apparatus Sep 10, 2023 Pending
Array ( [id] => 18848917 [patent_doc_number] => 20230411321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/459628 [patent_app_country] => US [patent_app_date] => 2023-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18459628 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/459628
Package substrate and semiconductor package including the same Aug 31, 2023 Issued
Array ( [id] => 20175999 [patent_doc_number] => 12394756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-08-19 [patent_title] => Backside integrated voltage regulator for integrated circuits [patent_app_type] => utility [patent_app_number] => 18/239368 [patent_app_country] => US [patent_app_date] => 2023-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18239368 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/239368
Backside integrated voltage regulator for integrated circuits Aug 28, 2023 Issued
Array ( [id] => 18833571 [patent_doc_number] => 20230402098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => 3D MEMORY DEVICES AND STRUCTURES WITH CONTROL CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/239117 [patent_app_country] => US [patent_app_date] => 2023-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18239117 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/239117
3D memory devices and structures with control circuits Aug 27, 2023 Issued
Array ( [id] => 18848927 [patent_doc_number] => 20230411331 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => HIGH-SPEED DIE CONNECTIONS USING A CONDUCTIVE INSERT [patent_app_type] => utility [patent_app_number] => 18/455960 [patent_app_country] => US [patent_app_date] => 2023-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18455960 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/455960
High-speed die connections using a conductive insert Aug 24, 2023 Issued
Array ( [id] => 19253158 [patent_doc_number] => 20240204155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => DISPLAY MODULE AND AN ELECTRONIC DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/454189 [patent_app_country] => US [patent_app_date] => 2023-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19256 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18454189 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/454189
DISPLAY MODULE AND AN ELECTRONIC DEVICE INCLUDING THE SAME Aug 22, 2023 Pending
Array ( [id] => 19253158 [patent_doc_number] => 20240204155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => DISPLAY MODULE AND AN ELECTRONIC DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/454189 [patent_app_country] => US [patent_app_date] => 2023-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19256 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18454189 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/454189
DISPLAY MODULE AND AN ELECTRONIC DEVICE INCLUDING THE SAME Aug 22, 2023 Pending
Array ( [id] => 18821191 [patent_doc_number] => 20230395532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => CHIP PACKAGE AND METHOD OF FORMING A CHIP PACKAGE [patent_app_type] => utility [patent_app_number] => 18/236858 [patent_app_country] => US [patent_app_date] => 2023-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4713 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18236858 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/236858
Chip package and method of forming a chip package Aug 21, 2023 Issued
Array ( [id] => 19130958 [patent_doc_number] => 20240136311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/234529 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234529 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234529
SEMICONDUCTOR PACKAGE Aug 15, 2023 Pending
Array ( [id] => 19130958 [patent_doc_number] => 20240136311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/234529 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234529 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234529
SEMICONDUCTOR PACKAGE Aug 15, 2023 Pending
Array ( [id] => 19130958 [patent_doc_number] => 20240136311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/234529 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234529 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234529
SEMICONDUCTOR PACKAGE Aug 14, 2023 Pending
Array ( [id] => 19130958 [patent_doc_number] => 20240136311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/234529 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234529 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234529
SEMICONDUCTOR PACKAGE Aug 14, 2023 Pending
Array ( [id] => 19086256 [patent_doc_number] => 20240113057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/231102 [patent_app_country] => US [patent_app_date] => 2023-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231102 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231102
SEMICONDUCTOR PACKAGE Aug 6, 2023 Pending
Array ( [id] => 19086256 [patent_doc_number] => 20240113057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/231102 [patent_app_country] => US [patent_app_date] => 2023-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231102 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231102
SEMICONDUCTOR PACKAGE Aug 6, 2023 Pending
Array ( [id] => 18975314 [patent_doc_number] => 20240055406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/364802 [patent_app_country] => US [patent_app_date] => 2023-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10094 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364802 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364802
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME Aug 2, 2023 Pending
Array ( [id] => 19720482 [patent_doc_number] => 12206027 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Gate-all-around integrated circuit structures having nanowires with tight vertical spacing [patent_app_type] => utility [patent_app_number] => 18/228139 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 23 [patent_no_of_words] => 14107 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18228139 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/228139
Gate-all-around integrated circuit structures having nanowires with tight vertical spacing Jul 30, 2023 Issued
Array ( [id] => 19741261 [patent_doc_number] => 12218106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Backside contact to improve thermal dissipation away from semiconductor devices [patent_app_type] => utility [patent_app_number] => 18/358186 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 23 [patent_no_of_words] => 10091 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358186 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/358186
Backside contact to improve thermal dissipation away from semiconductor devices Jul 24, 2023 Issued
Array ( [id] => 18774431 [patent_doc_number] => 20230369262 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => BONDING STRUCTURE AND METHOD OF FORMING SAME [patent_app_type] => utility [patent_app_number] => 18/357818 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15949 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357818 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357818
Bonding structure and method of forming same Jul 23, 2023 Issued
Array ( [id] => 18774429 [patent_doc_number] => 20230369260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-16 [patent_title] => BOND PAD WITH ENHANCED RELIABILITY [patent_app_type] => utility [patent_app_number] => 18/357350 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8401 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357350 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357350
Bond pad with enhanced reliability Jul 23, 2023 Issued
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