Rocio Del Mar Perez-velez

Array ( [id] => 11057529 [patent_doc_number] => 20160254491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-01 [patent_title] => 'OLED DISPLAY PANEL AND PACKAGING METHOD THEREOF, AND OLED DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/767975 [patent_app_country] => US [patent_app_date] => 2015-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4570 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14767975 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10590877 [patent_doc_number] => 09312499 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-04-12 [patent_title] => 'Organic electroluminescent materials and devices' [patent_app_type] => utility [patent_app_number] => 14/589471 [patent_app_country] => US [patent_app_date] => 2015-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 9206 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14589471 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10674270 [patent_doc_number] => 20160020415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-21 [patent_title] => 'ORGANIC PHOTOELECTRONIC DEVICE AND IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 14/587394 [patent_app_country] => US [patent_app_date] => 2014-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8455 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14587394 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11597118 [patent_doc_number] => 09644272 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-09 [patent_title] => 'Thin film deposition apparatus and method of manufacturing organic light-emitting display apparatus by using the same' [patent_app_type] => utility [patent_app_number] => 14/584190 [patent_app_country] => US [patent_app_date] => 2014-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10606 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14584190 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11831983 [patent_doc_number] => 09728731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Heterocyclic compound and organic light emitting device using same' [patent_app_type] => utility [patent_app_number] => 14/898342 [patent_app_country] => US [patent_app_date] => 2014-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 59 [patent_no_of_words] => 44359 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 9 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14898342 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11439213 [patent_doc_number] => 20170040234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-09 [patent_title] => 'METHOD OF MANUFACTURING THIN-FILM TRANSISTOR SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 15/304060 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8805 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15304060 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11424832 [patent_doc_number] => 20170032979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'PRODUCTION METHOD FOR SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 15/105909 [patent_app_country] => US [patent_app_date] => 2014-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9326 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15105909 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10118573 [patent_doc_number] => 09153461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-06 [patent_title] => 'Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device' [patent_app_type] => utility [patent_app_number] => 14/578330 [patent_app_country] => US [patent_app_date] => 2014-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3422 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14578330 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11483085 [patent_doc_number] => 09589635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Semiconductor device with a stoichiometric gradient' [patent_app_type] => utility [patent_app_number] => 14/567499 [patent_app_country] => US [patent_app_date] => 2014-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 8947 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14567499 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10557166 [patent_doc_number] => 09281371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-08 [patent_title] => 'Super-self-aligned contacts and method for making the same' [patent_app_type] => utility [patent_app_number] => 14/566249 [patent_app_country] => US [patent_app_date] => 2014-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 35 [patent_no_of_words] => 9561 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14566249 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11787596 [patent_doc_number] => 09397058 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-19 [patent_title] => 'Semiconductor device and method of forming patterned repassivation openings between RDL and UBM to reduce adverse effects of electro-migration' [patent_app_type] => utility [patent_app_number] => 14/563448 [patent_app_country] => US [patent_app_date] => 2014-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 5290 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14563448 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10131977 [patent_doc_number] => 09165819 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-20 [patent_title] => 'High linearity SOI wafer for low-distortion circuit applications' [patent_app_type] => utility [patent_app_number] => 14/546058 [patent_app_country] => US [patent_app_date] => 2014-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4007 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14546058 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10053439 [patent_doc_number] => 09093321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Three dimensional NAND device and method of charge trap layer separation and floating gate formation in the NAND device' [patent_app_type] => utility [patent_app_number] => 14/546671 [patent_app_country] => US [patent_app_date] => 2014-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 6413 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14546671 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11776254 [patent_doc_number] => 09385210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Method for manufacturing semiconductor device using a gettering layer' [patent_app_type] => utility [patent_app_number] => 14/537279 [patent_app_country] => US [patent_app_date] => 2014-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 7104 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14537279 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10557129 [patent_doc_number] => 09281334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-08 [patent_title] => 'Pickup device structure within a device isolation region' [patent_app_type] => utility [patent_app_number] => 14/520965 [patent_app_country] => US [patent_app_date] => 2014-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 4295 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14520965 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10370454 [patent_doc_number] => 20150255459 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'CMOS TRANSISTORS WITH IDENTICAL ACTIVE SEMICONDUCTOR REGION SHAPES' [patent_app_type] => utility [patent_app_number] => 14/515831 [patent_app_country] => US [patent_app_date] => 2014-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7731 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14515831 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10004146 [patent_doc_number] => 09048244 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-02 [patent_title] => 'Method for manufacturing a marked single-crystalline substrate and semiconductor device with marking' [patent_app_type] => utility [patent_app_number] => 14/515277 [patent_app_country] => US [patent_app_date] => 2014-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4339 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14515277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9836409 [patent_doc_number] => 20150028489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-29 [patent_title] => 'METHOD FOR OFF-GRID ROUTING STRUCTURES UTILIZING SELF ALIGNED DOUBLE PATTERNING (SADP) TECHNOLOGY' [patent_app_type] => utility [patent_app_number] => 14/513834 [patent_app_country] => US [patent_app_date] => 2014-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4447 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14513834 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13977047 [patent_doc_number] => 10217893 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-26 [patent_title] => Methods, apparatus, and systems for passivation of solar cells and other semiconductor devices [patent_app_type] => utility [patent_app_number] => 15/022175 [patent_app_country] => US [patent_app_date] => 2014-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 19 [patent_no_of_words] => 11094 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15022175 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9917269 [patent_doc_number] => 20150072474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'BACKSIDE MOLD PROCESS FOR ULTRA THIN SUBSTRATE AND PACKAGE ON PACKAGE ASSEMBLY' [patent_app_type] => utility [patent_app_number] => 14/486849 [patent_app_country] => US [patent_app_date] => 2014-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1386 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14486849 [rel_patent_id] =>[rel_patent_doc_number] =>)