
Rocio Del Mar Perez-velez
Examiner (ID: 4591, Phone: (571)270-5935 , Office: P/2132 )
| Most Active Art Unit | 2132 |
| Art Unit(s) | 2182, 2100, 2187, 2117, 2133, 2132 |
| Total Applications | 254 |
| Issued Applications | 200 |
| Pending Applications | 5 |
| Abandoned Applications | 50 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9594520
[patent_doc_number] => 20140191197
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-07-10
[patent_title] => 'AMORPHOUS MULTI-COMPONENT METALLIC THIN FILMS FOR ELECTRONIC DEVICES'
[patent_app_type] => utility
[patent_app_number] => 13/868308
[patent_app_country] => US
[patent_app_date] => 2013-04-23
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/868308 | Amorphous multi-component metallic thin films for electronic devices | Apr 22, 2013 | Issued |
Array
(
[id] => 9000342
[patent_doc_number] => 20130221467
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-29
[patent_title] => 'Performance Optically Coated Semiconductor Devices and Related Methods of Manufacture'
[patent_app_type] => utility
[patent_app_number] => 13/861875
[patent_app_country] => US
[patent_app_date] => 2013-04-12
[patent_effective_date] => 0000-00-00
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Array
(
[id] => 8960874
[patent_doc_number] => 20130200476
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-08
[patent_title] => 'Memory Cell with Phonon-Blocking Insulating Layer'
[patent_app_type] => utility
[patent_app_number] => 13/829137
[patent_app_country] => US
[patent_app_date] => 2013-03-14
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Array
(
[id] => 10863743
[patent_doc_number] => 08889439
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-11-18
[patent_title] => 'Method and apparatus for packaging phosphor-coated LEDs'
[patent_app_type] => utility
[patent_app_number] => 13/788536
[patent_app_country] => US
[patent_app_date] => 2013-03-07
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/788536 | Method and apparatus for packaging phosphor-coated LEDs | Mar 6, 2013 | Issued |
Array
(
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[patent_title] => 'Backside mold process for ultra thin substrate and package on package assembly'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/776189 | Backside mold process for ultra thin substrate and package on package assembly | Feb 24, 2013 | Issued |
Array
(
[id] => 9117318
[patent_doc_number] => 20130284240
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[patent_issue_date] => 2013-10-31
[patent_title] => 'Elongated Photovoltaic Devices, Methods of Making Same, and Systems for Making Same'
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Array
(
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[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
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Array
(
[id] => 9654265
[patent_doc_number] => 20140225270
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-14
[patent_title] => 'METHOD FOR OFF-GRID ROUTING STRUCTURES UTILIZING SELF ALIGNED DOUBLE PATTERNING (SADP) TECHNOLOGY'
[patent_app_type] => utility
[patent_app_number] => 13/766141
[patent_app_country] => US
[patent_app_date] => 2013-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/766141 | Method for off-grid routing structures utilizing self aligned double patterning (SADP) technology | Feb 12, 2013 | Issued |
Array
(
[id] => 9195275
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[patent_country] => US
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[patent_issue_date] => 2013-12-19
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME'
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Array
(
[id] => 8987023
[patent_doc_number] => 20130214304
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-22
[patent_title] => 'ILLUMINATING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/765987
[patent_app_country] => US
[patent_app_date] => 2013-02-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/765987 | Illuminating device | Feb 12, 2013 | Issued |
Array
(
[id] => 9692521
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[patent_issue_date] => 2014-09-02
[patent_title] => 'Semiconductor structure for a radiation detector and a radiation detector'
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Array
(
[id] => 9104669
[patent_doc_number] => 20130277800
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-24
[patent_title] => 'POWER SEMICONDUCTOR MODULE'
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Array
(
[id] => 9654160
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[patent_kind] => A1
[patent_issue_date] => 2014-08-14
[patent_title] => 'INTERCONNECT WIRING SWITCHES AND INTEGRATED CIRCUITS INCLUDING THE SAME'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/766028 | Interconnect wiring switches and integrated circuits including the same | Feb 12, 2013 | Issued |
Array
(
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[patent_title] => 'CHIP ASSEMBLY SYSTEM'
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[patent_app_number] => 13/765760
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/765760 | Chip assembly system | Feb 12, 2013 | Issued |
Array
(
[id] => 9000369
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Array
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Array
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Array
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Array
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Array
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