Search

Rocio Del Mar Perez-velez

Examiner (ID: 4591, Phone: (571)270-5935 , Office: P/2132 )

Most Active Art Unit
2132
Art Unit(s)
2182, 2100, 2187, 2117, 2133, 2132
Total Applications
254
Issued Applications
200
Pending Applications
5
Abandoned Applications
50

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9691743 [patent_doc_number] => 08822337 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-02 [patent_title] => 'Two-sided semiconductor structure' [patent_app_type] => utility [patent_app_number] => 13/607676 [patent_app_country] => US [patent_app_date] => 2012-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13607676 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/607676
Two-sided semiconductor structure Sep 7, 2012 Issued
Array ( [id] => 10667272 [patent_doc_number] => 20160013417 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-01-14 [patent_title] => 'ORGANIC ELECTROLUMINESCENCE DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/425280 [patent_app_country] => US [patent_app_date] => 2012-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 13186 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14425280 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/425280
Organic electroluminescence device and manufacturing method thereof Sep 6, 2012 Issued
Array ( [id] => 9749713 [patent_doc_number] => 08841188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-23 [patent_title] => 'Bulk finFET with controlled fin height and high-K liner' [patent_app_type] => utility [patent_app_number] => 13/604658 [patent_app_country] => US [patent_app_date] => 2012-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 7667 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604658 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604658
Bulk finFET with controlled fin height and high-K liner Sep 5, 2012 Issued
Array ( [id] => 8904299 [patent_doc_number] => 20130171801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-04 [patent_title] => 'SEMICONDUCTOR DEVICES HAVING NITRIDED GATE INSULATING LAYER AND METHODS OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/604352 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 53 [patent_figures_cnt] => 53 [patent_no_of_words] => 17306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604352 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604352
Semiconductor devices having nitrided gate insulating layer and methods of fabricating the same Sep 4, 2012 Issued
Array ( [id] => 8730230 [patent_doc_number] => 20130075799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'ELECTRO-OPTICAL DEVICE AND ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/603541 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 11484 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13603541 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/603541
Electro-optical device and electronic apparatus Sep 4, 2012 Issued
Array ( [id] => 8566687 [patent_doc_number] => 20120329258 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-27 [patent_title] => 'METHODS OF FORMING SEMICONDUCTOR DEVICES HAVING DIFFUSION REGIONS OF REDUCED WIDTH' [patent_app_type] => utility [patent_app_number] => 13/604411 [patent_app_country] => US [patent_app_date] => 2012-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5552 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13604411 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/604411
Methods of forming semiconductor devices having diffusion regions of reduced width Sep 4, 2012 Issued
Array ( [id] => 8705500 [patent_doc_number] => 20130062789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'MANUFACTURING A FILLING OF A GAP REGION' [patent_app_type] => utility [patent_app_number] => 13/602388 [patent_app_country] => US [patent_app_date] => 2012-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7797 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602388 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/602388
MANUFACTURING A FILLING OF A GAP REGION Sep 3, 2012 Abandoned
Array ( [id] => 8519700 [patent_doc_number] => 20120319108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-20 [patent_title] => 'TRANSISTOR, SEMICONDUCTOR DEVICE INCLUDING THE TRANSISTOR, AND MANUFACTURING METHOD OF THE TRANSISTOR AND THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/602393 [patent_app_country] => US [patent_app_date] => 2012-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 17908 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602393 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/602393
Transistor, semiconductor device including the transistor, and manufacturing method of the transistor and the semiconductor device Sep 3, 2012 Issued
Array ( [id] => 9339050 [patent_doc_number] => 20140065832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'ENHANCED FINFET PROCESS OVERLAY MARK' [patent_app_type] => utility [patent_app_number] => 13/602697 [patent_app_country] => US [patent_app_date] => 2012-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 6809 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602697 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/602697
Enhanced FinFET process overlay mark Sep 3, 2012 Issued
Array ( [id] => 9649304 [patent_doc_number] => 08803324 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-12 [patent_title] => 'Semiconductor devices and methods of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/602101 [patent_app_country] => US [patent_app_date] => 2012-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 5830 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13602101 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/602101
Semiconductor devices and methods of manufacturing the same Aug 31, 2012 Issued
Array ( [id] => 9552136 [patent_doc_number] => 08759183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-24 [patent_title] => 'Methods of forming semiconductor devices using electrolyzed sulfuric acid (ESA)' [patent_app_type] => utility [patent_app_number] => 13/600432 [patent_app_country] => US [patent_app_date] => 2012-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 60 [patent_no_of_words] => 13758 [patent_no_of_claims] => 53 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13600432 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/600432
Methods of forming semiconductor devices using electrolyzed sulfuric acid (ESA) Aug 30, 2012 Issued
Array ( [id] => 9335132 [patent_doc_number] => 20140061914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'DOPING OF COPPER WIRING STRUCTURES IN BACK END OF LINE PROCESSING' [patent_app_type] => utility [patent_app_number] => 13/599256 [patent_app_country] => US [patent_app_date] => 2012-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2768 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13599256 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/599256
Doping of copper wiring structures in back end of line processing Aug 29, 2012 Issued
Array ( [id] => 9335069 [patent_doc_number] => 20140061851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'METAL-VIA FUSE' [patent_app_type] => utility [patent_app_number] => 13/599654 [patent_app_country] => US [patent_app_date] => 2012-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4931 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13599654 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/599654
Metal-via fuse Aug 29, 2012 Issued
Array ( [id] => 9339027 [patent_doc_number] => 20140065809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/596619 [patent_app_country] => US [patent_app_date] => 2012-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8827 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13596619 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/596619
Semiconductor device and method for fabricating the same Aug 27, 2012 Issued
Array ( [id] => 9327834 [patent_doc_number] => 20140054616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'Method and Apparatus for Fabricating Phosphor-Coated LED Dies' [patent_app_type] => utility [patent_app_number] => 13/594219 [patent_app_country] => US [patent_app_date] => 2012-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5926 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13594219 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/594219
Method and apparatus for fabricating phosphor-coated LED dies Aug 23, 2012 Issued
Array ( [id] => 8671019 [patent_doc_number] => 20130045557 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'DEPOSITION OF POROUS FILMS FOR THERMOELECTRIC APPLICATIONS' [patent_app_type] => utility [patent_app_number] => 13/587325 [patent_app_country] => US [patent_app_date] => 2012-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4399 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13587325 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/587325
Deposition of porous films for thermoelectric applications Aug 15, 2012 Issued
Array ( [id] => 8509723 [patent_doc_number] => 20120309131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME' [patent_app_type] => utility [patent_app_number] => 13/572512 [patent_app_country] => US [patent_app_date] => 2012-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 17452 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13572512 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/572512
Semiconductor device and method of manufacturing same Aug 9, 2012 Issued
Array ( [id] => 8486940 [patent_doc_number] => 20120286347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-15 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/559859 [patent_app_country] => US [patent_app_date] => 2012-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13914 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13559859 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/559859
Semiconductor device Jul 26, 2012 Issued
Array ( [id] => 10351129 [patent_doc_number] => 20150236134 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/412237 [patent_app_country] => US [patent_app_date] => 2012-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 3723 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14412237 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/412237
Method of manufacturing semiconductor device Jul 17, 2012 Issued
Array ( [id] => 8668951 [patent_doc_number] => 20130043489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'COMPOUND SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/548324 [patent_app_country] => US [patent_app_date] => 2012-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5725 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13548324 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/548324
Compound semiconductor device and method for manufacturing the same Jul 12, 2012 Issued
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