Search

Rocio Del Mar Perez-velez

Examiner (ID: 4591, Phone: (571)270-5935 , Office: P/2132 )

Most Active Art Unit
2132
Art Unit(s)
2182, 2100, 2187, 2117, 2133, 2132
Total Applications
254
Issued Applications
200
Pending Applications
5
Abandoned Applications
50

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8261737 [patent_doc_number] => 20120161169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'LIGHT-EMITTING DIODE DIE PACKAGE AND METHOD FOR PRODUCING SAME' [patent_app_type] => utility [patent_app_number] => 13/413443 [patent_app_country] => US [patent_app_date] => 2012-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2909 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13413443 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/413443
Light-emitting diode die package and method for producing same Mar 5, 2012 Issued
Array ( [id] => 10158765 [patent_doc_number] => 09190549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Solar cell made using a barrier layer between p-type and intrinsic layers' [patent_app_type] => utility [patent_app_number] => 13/406815 [patent_app_country] => US [patent_app_date] => 2012-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3870 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13406815 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/406815
Solar cell made using a barrier layer between p-type and intrinsic layers Feb 27, 2012 Issued
Array ( [id] => 9000340 [patent_doc_number] => 20130221464 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'REDUCED LIGHT DEGRADATION DUE TO LOW POWER DEPOSITION OF BUFFER LAYER' [patent_app_type] => utility [patent_app_number] => 13/407006 [patent_app_country] => US [patent_app_date] => 2012-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5110 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13407006 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/407006
Reduced light degradation due to low power deposition of buffer layer Feb 27, 2012 Issued
Array ( [id] => 8252515 [patent_doc_number] => 20120156838 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'MULTI-GATE NON-PLANAR FIELD EFFECT TRANSISTOR STRUCTURE AND METHOD OF FORMING THE STRUCTURE USING A DOPANT IMPLANT PROCESS TO TUNE DEVICE DRIVE CURRENT' [patent_app_type] => utility [patent_app_number] => 13/406652 [patent_app_country] => US [patent_app_date] => 2012-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9756 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0156/20120156838.pdf [firstpage_image] =>[orig_patent_app_number] => 13406652 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/406652
Multi-gate non-planar field effect transistor structure and method of forming the structure using a dopant implant process to tune device drive current Feb 27, 2012 Issued
Array ( [id] => 8647194 [patent_doc_number] => 20130032924 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-07 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING CYLINDRICAL LOWER ELECTRODE OF CAPACITOR AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/366391 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 8662 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13366391 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/366391
Semiconductor device having cylindrical lower electrode of capacitor and manufacturing method thereof Feb 5, 2012 Issued
Array ( [id] => 8205059 [patent_doc_number] => 20120126278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'SEMICONDUCTOR LIGHT EMITTING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/362231 [patent_app_country] => US [patent_app_date] => 2012-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4828 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20120126278.pdf [firstpage_image] =>[orig_patent_app_number] => 13362231 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/362231
Semiconductor light emitting device Jan 30, 2012 Issued
Array ( [id] => 8193011 [patent_doc_number] => 20120119353 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'UNDERFILL METHOD AND CHIP PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/358910 [patent_app_country] => US [patent_app_date] => 2012-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2774 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119353.pdf [firstpage_image] =>[orig_patent_app_number] => 13358910 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/358910
Underfill method and chip package Jan 25, 2012 Issued
Array ( [id] => 9209428 [patent_doc_number] => 20140008605 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-09 [patent_title] => 'METHOD FOR DISPERSING QUANTUM DOTS OR QUANTUM WIRES IN ZEOLITE, METHOD FOR STABILIZING QUANTUM DOTS OR QUANTUM WIRES IN ZEOLITE, AND ZEOLITE CONTAINING QUANTUM DOTS OR QUANTUM WIRES DISPERSED BY THE METHOD' [patent_app_type] => utility [patent_app_number] => 13/979965 [patent_app_country] => US [patent_app_date] => 2012-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8374 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13979965 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/979965
Method for dispersing quantum dots or quantum wires in zeolite, method for stabilizing quantum dots or quantum wires in zeolite, and zeolite containing quantum dots or quantum wires dispersed by the method Jan 18, 2012 Issued
Array ( [id] => 8172531 [patent_doc_number] => 20120107963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-03 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/343195 [patent_app_country] => US [patent_app_date] => 2012-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 18254 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20120107963.pdf [firstpage_image] =>[orig_patent_app_number] => 13343195 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/343195
Semiconductor device and manufacturing method thereof Jan 3, 2012 Issued
Array ( [id] => 9312451 [patent_doc_number] => 08653673 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Method for packaging semiconductors at a wafer level' [patent_app_type] => utility [patent_app_number] => 13/331408 [patent_app_country] => US [patent_app_date] => 2011-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2428 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13331408 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/331408
Method for packaging semiconductors at a wafer level Dec 19, 2011 Issued
Array ( [id] => 9239095 [patent_doc_number] => 08603886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-10 [patent_title] => 'Intermediate epitaxial structure and method for fabricating an epitaxial structure' [patent_app_type] => utility [patent_app_number] => 13/331423 [patent_app_country] => US [patent_app_date] => 2011-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 1573 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13331423 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/331423
Intermediate epitaxial structure and method for fabricating an epitaxial structure Dec 19, 2011 Issued
Array ( [id] => 9286694 [patent_doc_number] => 08643024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-04 [patent_title] => 'In-situ defect reduction techniques for nonpolar and semipolar (Al, Ga, In)N' [patent_app_type] => utility [patent_app_number] => 13/331973 [patent_app_country] => US [patent_app_date] => 2011-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5405 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13331973 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/331973
In-situ defect reduction techniques for nonpolar and semipolar (Al, Ga, In)N Dec 19, 2011 Issued
Array ( [id] => 8462461 [patent_doc_number] => 20120267629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-25 [patent_title] => 'Organic Light-Emitting Display Apparatus and Method of Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 13/330477 [patent_app_country] => US [patent_app_date] => 2011-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7170 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330477 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/330477
Organic light-emitting display apparatus and method of manufacturing the same Dec 18, 2011 Issued
Array ( [id] => 9250362 [patent_doc_number] => 08614140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-24 [patent_title] => 'Semiconductor device manufacturing apparatus' [patent_app_type] => utility [patent_app_number] => 13/329677 [patent_app_country] => US [patent_app_date] => 2011-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 43 [patent_no_of_words] => 9064 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13329677 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/329677
Semiconductor device manufacturing apparatus Dec 18, 2011 Issued
Array ( [id] => 8880776 [patent_doc_number] => 20130153960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'Anti-Fuses on Semiconductor Fins' [patent_app_type] => utility [patent_app_number] => 13/328944 [patent_app_country] => US [patent_app_date] => 2011-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3352 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13328944 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/328944
Anti-fuses on semiconductor fins Dec 15, 2011 Issued
Array ( [id] => 9497129 [patent_doc_number] => 08735951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Semiconductor device having diffusion barrier element injection region' [patent_app_type] => utility [patent_app_number] => 13/327960 [patent_app_country] => US [patent_app_date] => 2011-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 33 [patent_no_of_words] => 16352 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327960 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/327960
Semiconductor device having diffusion barrier element injection region Dec 15, 2011 Issued
Array ( [id] => 9497068 [patent_doc_number] => 08735890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-27 [patent_title] => 'Display substrate and method of manufacturing the display substrate' [patent_app_type] => utility [patent_app_number] => 13/328658 [patent_app_country] => US [patent_app_date] => 2011-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 8742 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13328658 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/328658
Display substrate and method of manufacturing the display substrate Dec 15, 2011 Issued
Array ( [id] => 10832041 [patent_doc_number] => 08860215 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-14 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/327292 [patent_app_country] => US [patent_app_date] => 2011-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 17 [patent_no_of_words] => 10807 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327292 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/327292
Semiconductor device and method of manufacturing the same Dec 14, 2011 Issued
Array ( [id] => 8880803 [patent_doc_number] => 20130153987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'ELECTRONIC DEVICE COMPRISING A CONDUCTIVE STRUCTURE AND AN INSULATING LAYER WITHIN A TRENCH AND A PROCESS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/327361 [patent_app_country] => US [patent_app_date] => 2011-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11170 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13327361 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/327361
Electronic device comprising a conductive structure and an insulating layer within a trench and a process of forming the same Dec 14, 2011 Issued
Array ( [id] => 8880923 [patent_doc_number] => 20130154107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-20 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH COUPLING FEATURES AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/326116 [patent_app_country] => US [patent_app_date] => 2011-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13326116 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/326116
Integrated circuit packaging system with coupling features and method of manufacture thereof Dec 13, 2011 Issued
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