Search

Rocio Del Mar Perez-velez

Examiner (ID: 4591, Phone: (571)270-5935 , Office: P/2132 )

Most Active Art Unit
2132
Art Unit(s)
2182, 2100, 2187, 2117, 2133, 2132
Total Applications
254
Issued Applications
200
Pending Applications
5
Abandoned Applications
50

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5180656 [patent_doc_number] => 20070051998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-08 [patent_title] => 'Semiconductor memory device with dielectric structure and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/387563 [patent_app_country] => US [patent_app_date] => 2006-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5779 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20070051998.pdf [firstpage_image] =>[orig_patent_app_number] => 11387563 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/387563
Semiconductor memory device with dielectric structure and method for fabricating the same Mar 21, 2006 Abandoned
Array ( [id] => 5697550 [patent_doc_number] => 20060214234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-09-28 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => utility [patent_app_number] => 11/384361 [patent_app_country] => US [patent_app_date] => 2006-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5114 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20060214234.pdf [firstpage_image] =>[orig_patent_app_number] => 11384361 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/384361
Semiconductor integrated circuit Mar 20, 2006 Issued
Array ( [id] => 5913045 [patent_doc_number] => 20060128107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-06-15 [patent_title] => 'Methods of forming memory devices' [patent_app_type] => utility [patent_app_number] => 11/348571 [patent_app_country] => US [patent_app_date] => 2006-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9417 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20060128107.pdf [firstpage_image] =>[orig_patent_app_number] => 11348571 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/348571
Memory devices, electronic systems, and methods of forming memory devices Feb 5, 2006 Issued
Array ( [id] => 267085 [patent_doc_number] => 07566610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-28 [patent_title] => 'Process for manufacturing integrated resistive elements with silicidation protection' [patent_app_type] => utility [patent_app_number] => 11/343593 [patent_app_country] => US [patent_app_date] => 2006-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 18 [patent_no_of_words] => 3064 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/566/07566610.pdf [firstpage_image] =>[orig_patent_app_number] => 11343593 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/343593
Process for manufacturing integrated resistive elements with silicidation protection Jan 29, 2006 Issued
Array ( [id] => 282151 [patent_doc_number] => 07554152 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-06-30 [patent_title] => 'Versatile system for integrated sense transistor' [patent_app_type] => utility [patent_app_number] => 11/330049 [patent_app_country] => US [patent_app_date] => 2006-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2701 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/554/07554152.pdf [firstpage_image] =>[orig_patent_app_number] => 11330049 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/330049
Versatile system for integrated sense transistor Jan 10, 2006 Issued
Array ( [id] => 4570955 [patent_doc_number] => 07829377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Diamond medical devices' [patent_app_type] => utility [patent_app_number] => 11/329959 [patent_app_country] => US [patent_app_date] => 2006-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 11060 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/829/07829377.pdf [firstpage_image] =>[orig_patent_app_number] => 11329959 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/329959
Diamond medical devices Jan 10, 2006 Issued
Array ( [id] => 326987 [patent_doc_number] => 07514761 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-07 [patent_title] => 'Triple operation voltage device' [patent_app_type] => utility [patent_app_number] => 11/270192 [patent_app_country] => US [patent_app_date] => 2005-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1948 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/514/07514761.pdf [firstpage_image] =>[orig_patent_app_number] => 11270192 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/270192
Triple operation voltage device Nov 7, 2005 Issued
Array ( [id] => 5676458 [patent_doc_number] => 20060181813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Magnetic random access memory' [patent_app_type] => utility [patent_app_number] => 11/224094 [patent_app_country] => US [patent_app_date] => 2005-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0181/20060181813.pdf [firstpage_image] =>[orig_patent_app_number] => 11224094 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/224094
Magnetic random access memory Sep 12, 2005 Issued
Array ( [id] => 4715251 [patent_doc_number] => 20080237773 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'Integrated High Voltage Power Device Having an Edge Termination of Enhanced Effectiveness' [patent_app_type] => utility [patent_app_number] => 11/575227 [patent_app_country] => US [patent_app_date] => 2005-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20080237773.pdf [firstpage_image] =>[orig_patent_app_number] => 11575227 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/575227
Integrated high voltage power device having an edge termination of enhanced effectiveness Sep 11, 2005 Issued
Array ( [id] => 81522 [patent_doc_number] => 07745296 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-29 [patent_title] => 'Raised source and drain process with disposable spacers' [patent_app_type] => utility [patent_app_number] => 11/147383 [patent_app_country] => US [patent_app_date] => 2005-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 22 [patent_no_of_words] => 3575 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/745/07745296.pdf [firstpage_image] =>[orig_patent_app_number] => 11147383 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/147383
Raised source and drain process with disposable spacers Jun 7, 2005 Issued
Array ( [id] => 8527753 [patent_doc_number] => 08304323 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-06 [patent_title] => 'Semiconductor element manufacturing method' [patent_app_type] => utility [patent_app_number] => 11/794617 [patent_app_country] => US [patent_app_date] => 2005-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 3541 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11794617 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/794617
Semiconductor element manufacturing method Jan 4, 2005 Issued
Array ( [id] => 7752628 [patent_doc_number] => 08110894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-07 [patent_title] => 'Protection for an integrated circuit chip containing confidential data' [patent_app_type] => utility [patent_app_number] => 10/583377 [patent_app_country] => US [patent_app_date] => 2004-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 6296 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/110/08110894.pdf [firstpage_image] =>[orig_patent_app_number] => 10583377 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/583377
Protection for an integrated circuit chip containing confidential data Dec 22, 2004 Issued
Array ( [id] => 247034 [patent_doc_number] => 07585786 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-09-08 [patent_title] => 'Methods of forming spin-on-glass insulating layers in semiconductor devices and associated semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/010223 [patent_app_country] => US [patent_app_date] => 2004-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 7859 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/585/07585786.pdf [firstpage_image] =>[orig_patent_app_number] => 11010223 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/010223
Methods of forming spin-on-glass insulating layers in semiconductor devices and associated semiconductor device Dec 9, 2004 Issued
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