Ronald Griffin

Array ( [id] => 11019802 [patent_doc_number] => 20160216754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'METHOD AND APPARATUS TO CONFIGURE THERMAL DESIGN POWER IN A MICROPROCESSOR' [patent_app_type] => utility [patent_app_number] => 15/089350 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4791 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15089350 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16478141 [patent_doc_number] => 10853089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Dynamically loading firmware based on geographic location [patent_app_type] => utility [patent_app_number] => 15/084846 [patent_app_country] => US [patent_app_date] => 2016-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10017 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15084846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11973084 [patent_doc_number] => 20170277238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'PEAK CURRENT SUPPORT FOR A POWER RAIL SYSTEM VIA A SHARED SECONDARY POWER SUPPLY' [patent_app_type] => utility [patent_app_number] => 15/077949 [patent_app_country] => US [patent_app_date] => 2016-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6675 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15077949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11095020 [patent_doc_number] => 20160291988 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-06 [patent_title] => 'APPARATUS AND METHOD' [patent_app_type] => utility [patent_app_number] => 15/075593 [patent_app_country] => US [patent_app_date] => 2016-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8542 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15075593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11501426 [patent_doc_number] => 20170075611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-16 [patent_title] => 'METHOD AND APPARATUS OF DYNAMIC PARALLELISM FOR CONTROLLING POWER CONSUMPTION OF SSDs' [patent_app_type] => utility [patent_app_number] => 15/076504 [patent_app_country] => US [patent_app_date] => 2016-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6676 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15076504 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11664967 [patent_doc_number] => 20170153687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-01 [patent_title] => 'POWER MANAGEMENT OF USER INTERFACES WITH COORDINATED ULTRA-LOW POWER STATES' [patent_app_type] => utility [patent_app_number] => 15/074774 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5924 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15074774 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11116968 [patent_doc_number] => 20160313942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'ELECTRONIC APPARATUS, METHOD, AND COMPUTER READABLE MEDIUM' [patent_app_type] => utility [patent_app_number] => 15/073797 [patent_app_country] => US [patent_app_date] => 2016-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 10553 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15073797 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16337932 [patent_doc_number] => 10788886 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-29 [patent_title] => Controlling transitions of devices between normal state and quiescent state [patent_app_type] => utility [patent_app_number] => 15/567707 [patent_app_country] => US [patent_app_date] => 2016-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9715 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15567707 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14149209 [patent_doc_number] => 10254985 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-09 [patent_title] => Power management of storage devices [patent_app_type] => utility [patent_app_number] => 15/071038 [patent_app_country] => US [patent_app_date] => 2016-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8242 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15071038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15758029 [patent_doc_number] => 10621128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Controlling transitions of devices between normal state and quiescent state [patent_app_type] => utility [patent_app_number] => 15/567696 [patent_app_country] => US [patent_app_date] => 2016-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9645 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15567696 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11077667 [patent_doc_number] => 20160274631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'ELECTRONIC DEVICE AND METHOD OF PREVENTING ELECTRONIC DEVICE FROM ENTERING HIBERNATION' [patent_app_type] => utility [patent_app_number] => 15/063857 [patent_app_country] => US [patent_app_date] => 2016-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3371 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15063857 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11042106 [patent_doc_number] => 20160239063 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'Charging a Provider/Consumer with a Dead Battery via USB Power Delivery' [patent_app_type] => utility [patent_app_number] => 15/063001 [patent_app_country] => US [patent_app_date] => 2016-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6699 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15063001 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12869662 [patent_doc_number] => 20180181729 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => PROTECTING A COMPUTER PROGRAM AGAINST REVERSE ENGINEERING [patent_app_type] => utility [patent_app_number] => 15/554830 [patent_app_country] => US [patent_app_date] => 2016-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4560 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15554830 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11853743 [patent_doc_number] => 20170228235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'PROTECTING AND VERIFYING CONTENTS OF FILES ON MOBILE COMPUTING DEVICES' [patent_app_type] => utility [patent_app_number] => 15/017601 [patent_app_country] => US [patent_app_date] => 2016-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7908 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15017601 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11853704 [patent_doc_number] => 20170228196 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-10 [patent_title] => 'Forced Idling of Memory Subsystems' [patent_app_type] => utility [patent_app_number] => 15/016806 [patent_app_country] => US [patent_app_date] => 2016-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6669 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15016806 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11731039 [patent_doc_number] => 20170192482 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'Fingerprint Sensor With Power Saving Operating Modes, and Corresponding Devices, Systems, and Methods' [patent_app_type] => utility [patent_app_number] => 14/986328 [patent_app_country] => US [patent_app_date] => 2015-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12636 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14986328 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11019799 [patent_doc_number] => 20160216752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-07-28 [patent_title] => 'SYSTEM ON CHIP, METHOD OF MANAGING POWER THEREOF, AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 14/983809 [patent_app_country] => US [patent_app_date] => 2015-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6500 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14983809 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11716929 [patent_doc_number] => 20170185428 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'TECHNOLOGIES FOR MANAGING SENSOR CONFLICTS' [patent_app_type] => utility [patent_app_number] => 14/757833 [patent_app_country] => US [patent_app_date] => 2015-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8847 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14757833 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11716629 [patent_doc_number] => 20170185128 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'Method and apparatus to control number of cores to transition operational states' [patent_app_type] => utility [patent_app_number] => 14/757561 [patent_app_country] => US [patent_app_date] => 2015-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14757561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11716630 [patent_doc_number] => 20170185129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'Mitigating component performance variation' [patent_app_type] => utility [patent_app_number] => 14/998082 [patent_app_country] => US [patent_app_date] => 2015-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4175 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14998082 [rel_patent_id] =>[rel_patent_doc_number] =>)