Search

Ronald Griffin

Examiner (ID: 3104)

Most Active Art Unit
1505
Art Unit(s)
2899, 1815, 1609, 1505, 1503, 1803, 1611, 1802, 1203
Total Applications
1799
Issued Applications
1610
Pending Applications
8
Abandoned Applications
181

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17038863 [patent_doc_number] => 20210255822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-08-19 [patent_title] => Playback Device Using Standby in a Media Playback System [patent_app_type] => utility [patent_app_number] => 17/129235 [patent_app_country] => US [patent_app_date] => 2020-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20267 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 226 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17129235 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/129235
Playback device using standby in a media playback system Dec 20, 2020 Issued
Array ( [id] => 17824194 [patent_doc_number] => 11429142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-30 [patent_title] => Glitch detector [patent_app_type] => utility [patent_app_number] => 17/247651 [patent_app_country] => US [patent_app_date] => 2020-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 13577 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17247651 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/247651
Glitch detector Dec 17, 2020 Issued
Array ( [id] => 17437455 [patent_doc_number] => 11262786 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-03-01 [patent_title] => Data delay compensator circuit [patent_app_type] => utility [patent_app_number] => 17/123949 [patent_app_country] => US [patent_app_date] => 2020-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 6840 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17123949 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/123949
Data delay compensator circuit Dec 15, 2020 Issued
Array ( [id] => 18917952 [patent_doc_number] => 11880231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Accurate timestamp or derived counter value generation on a complex CPU [patent_app_type] => utility [patent_app_number] => 17/121340 [patent_app_country] => US [patent_app_date] => 2020-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 7594 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17121340 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/121340
Accurate timestamp or derived counter value generation on a complex CPU Dec 13, 2020 Issued
Array ( [id] => 18158016 [patent_doc_number] => 20230024607 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SYSTEM-ON-CHIP FOR SHARING GRAPHICS PROCESSING UNIT THAT SUPPORTS MULTIMASTER, AND METHOD FOR OPERATING GRAPHICS PROCESSING UNIT [patent_app_type] => utility [patent_app_number] => 17/778961 [patent_app_country] => US [patent_app_date] => 2020-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5854 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17778961 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/778961
SYSTEM-ON-CHIP FOR SHARING GRAPHICS PROCESSING UNIT THAT SUPPORTS MULTIMASTER, AND METHOD FOR OPERATING GRAPHICS PROCESSING UNIT Nov 24, 2020 Pending
Array ( [id] => 17977092 [patent_doc_number] => 11493951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Precision latency control [patent_app_type] => utility [patent_app_number] => 16/950561 [patent_app_country] => US [patent_app_date] => 2020-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3473 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16950561 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/950561
Precision latency control Nov 16, 2020 Issued
Array ( [id] => 18163833 [patent_doc_number] => 20230030427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => OPERATING MASTER PROCESSORS IN POWER SAVING MODE [patent_app_type] => utility [patent_app_number] => 17/788492 [patent_app_country] => US [patent_app_date] => 2020-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10110 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17788492 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/788492
OPERATING MASTER PROCESSORS IN POWER SAVING MODE Nov 15, 2020 Pending
Array ( [id] => 16630186 [patent_doc_number] => 20210048839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-18 [patent_title] => MULTI-PHASE SIGNAL GENERATION [patent_app_type] => utility [patent_app_number] => 17/089390 [patent_app_country] => US [patent_app_date] => 2020-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19601 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17089390 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/089390
Multi-phase signal generation Nov 3, 2020 Issued
Array ( [id] => 16690333 [patent_doc_number] => 20210072811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => NEGOTIATING A TRANSMIT WAKE TIME [patent_app_type] => utility [patent_app_number] => 17/087891 [patent_app_country] => US [patent_app_date] => 2020-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3456 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17087891 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/087891
Negotiating a transmit wake time Nov 2, 2020 Issued
Array ( [id] => 16636631 [patent_doc_number] => 10915137 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-09 [patent_title] => Estimation of clock synchronization errors using time difference of arrival [patent_app_type] => utility [patent_app_number] => 17/068626 [patent_app_country] => US [patent_app_date] => 2020-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12278 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17068626 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/068626
Estimation of clock synchronization errors using time difference of arrival Oct 11, 2020 Issued
Array ( [id] => 16678150 [patent_doc_number] => 20210066916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-04 [patent_title] => Electrical Power Transmission [patent_app_type] => utility [patent_app_number] => 17/021395 [patent_app_country] => US [patent_app_date] => 2020-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17021395 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/021395
Electrical power transmission Sep 14, 2020 Issued
Array ( [id] => 16545656 [patent_doc_number] => 20200412071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => MONITORING OF DEVICES [patent_app_type] => utility [patent_app_number] => 17/020875 [patent_app_country] => US [patent_app_date] => 2020-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5543 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17020875 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/020875
Monitoring of devices Sep 14, 2020 Issued
Array ( [id] => 16470037 [patent_doc_number] => 20200371574 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-26 [patent_title] => DATACENTER POWER MANIPULATION USING POWER CACHES [patent_app_type] => utility [patent_app_number] => 16/993329 [patent_app_country] => US [patent_app_date] => 2020-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10499 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16993329 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/993329
DATACENTER POWER MANIPULATION USING POWER CACHES Aug 13, 2020 Abandoned
Array ( [id] => 18519792 [patent_doc_number] => 11709683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => State semantics kexec based firmware update [patent_app_type] => utility [patent_app_number] => 16/987564 [patent_app_country] => US [patent_app_date] => 2020-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3183 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16987564 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/987564
State semantics kexec based firmware update Aug 6, 2020 Issued
Array ( [id] => 16393252 [patent_doc_number] => 20200334193 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-22 [patent_title] => DYNAMICALLY UPDATING LOGICAL IDENTIFIERS OF CORES OF A PROCESSOR [patent_app_type] => utility [patent_app_number] => 16/916197 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16916197 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/916197
Dynamically updating logical identifiers of cores of a processor Jun 29, 2020 Issued
Array ( [id] => 18623290 [patent_doc_number] => 11756340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-12 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 16/902527 [patent_app_country] => US [patent_app_date] => 2020-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4653 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16902527 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/902527
Display device Jun 15, 2020 Issued
Array ( [id] => 18981834 [patent_doc_number] => 11907006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Technique for correcting a time parameter [patent_app_type] => utility [patent_app_number] => 17/610173 [patent_app_country] => US [patent_app_date] => 2020-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7196 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17610173 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/610173
Technique for correcting a time parameter May 12, 2020 Issued
Array ( [id] => 18234585 [patent_doc_number] => 11599142 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-03-07 [patent_title] => Timing generator, timing generating method, and associated control chip [patent_app_type] => utility [patent_app_number] => 16/865413 [patent_app_country] => US [patent_app_date] => 2020-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3067 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16865413 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/865413
Timing generator, timing generating method, and associated control chip May 2, 2020 Issued
Array ( [id] => 17924377 [patent_doc_number] => 11467624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => Clock domain translation for non-synchronized sensors [patent_app_type] => utility [patent_app_number] => 16/851698 [patent_app_country] => US [patent_app_date] => 2020-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8300 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16851698 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/851698
Clock domain translation for non-synchronized sensors Apr 16, 2020 Issued
Array ( [id] => 17113990 [patent_doc_number] => 20210294587 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-23 [patent_title] => HIGH PERFORMANCE COMPUTING NODE CONFIGURATION MECHANISM [patent_app_type] => utility [patent_app_number] => 16/820883 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16820883 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/820883
High performance computing node configuration mechanism Mar 16, 2020 Issued
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